timing.cc (5315:30997e988446) timing.cc (5335:69d45f5f21a2)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 584 unchanged lines hidden (view full) ---

593 // load or store: just send to dcache
594 Fault fault = curStaticInst->initiateAcc(this, traceData);
595 if (_status != Running) {
596 // instruction will complete in dcache response callback
597 assert(_status == DcacheWaitResponse || _status == DcacheRetry);
598 assert(fault == NoFault);
599 } else {
600 if (fault == NoFault) {
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 584 unchanged lines hidden (view full) ---

593 // load or store: just send to dcache
594 Fault fault = curStaticInst->initiateAcc(this, traceData);
595 if (_status != Running) {
596 // instruction will complete in dcache response callback
597 assert(_status == DcacheWaitResponse || _status == DcacheRetry);
598 assert(fault == NoFault);
599 } else {
600 if (fault == NoFault) {
601 // Note that ARM can have NULL packets if the instruction gets
602 // squashed due to predication
601 // early fail on store conditional: complete now
603 // early fail on store conditional: complete now
602 assert(dcache_pkt != NULL);
604 assert(dcache_pkt != NULL || THE_ISA == ARM_ISA);
605
603 fault = curStaticInst->completeAcc(dcache_pkt, this,
604 traceData);
606 fault = curStaticInst->completeAcc(dcache_pkt, this,
607 traceData);
605 delete dcache_pkt->req;
606 delete dcache_pkt;
607 dcache_pkt = NULL;
608 if (dcache_pkt != NULL)
609 {
610 delete dcache_pkt->req;
611 delete dcache_pkt;
612 dcache_pkt = NULL;
613 }
608
609 // keep an instruction count
610 if (fault == NoFault)
611 countInst();
612 } else if (traceData) {
613 // If there was a fault, we shouldn't trace this instruction.
614 delete traceData;
615 traceData = NULL;

--- 256 unchanged lines hidden --- 		614
615 // keep an instruction count
616 if (fault == NoFault)
617 countInst();
618 } else if (traceData) {
619 // If there was a fault, we shouldn't trace this instruction.
620 delete traceData;
621 traceData = NULL;

--- 256 unchanged lines hidden ---