timing.cc (5018:21795007349e) timing.cc (5099:8ff1345b3ae4)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 166 unchanged lines hidden (view full) ---

175 previousTick = curTick;
176}
177
178void
179TimingSimpleCPU::switchOut()
180{
181 assert(status() == Running || status() == Idle);
182 _status = SwitchedOut;
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 166 unchanged lines hidden (view full) ---

175 previousTick = curTick;
176}
177
178void
179TimingSimpleCPU::switchOut()
180{
181 assert(status() == Running || status() == Idle);
182 _status = SwitchedOut;
183 numCycles += curTick - previousTick;
183 numCycles += tickToCycles(curTick - previousTick);
184
185 // If we've been scheduled to resume but are then told to switch out,
186 // we'll need to cancel it.
187 if (fetchEvent && fetchEvent->scheduled())
188 fetchEvent->deschedule();
189}
190
191

--- 286 unchanged lines hidden (view full) ---

478 }
479 } else {
480 delete ifetch_req;
481 delete ifetch_pkt;
482 // fetch fault: advance directly to next instruction (fault handler)
483 advanceInst(fault);
484 }
485
184
185 // If we've been scheduled to resume but are then told to switch out,
186 // we'll need to cancel it.
187 if (fetchEvent && fetchEvent->scheduled())
188 fetchEvent->deschedule();
189}
190
191

--- 286 unchanged lines hidden (view full) ---

478 }
479 } else {
480 delete ifetch_req;
481 delete ifetch_pkt;
482 // fetch fault: advance directly to next instruction (fault handler)
483 advanceInst(fault);
484 }
485
486 numCycles += curTick - previousTick;
486 numCycles += tickToCycles(curTick - previousTick);
487 previousTick = curTick;
488}
489
490
491void
492TimingSimpleCPU::advanceInst(Fault fault)
493{
494 advancePC(fault);

--- 12 unchanged lines hidden (view full) ---

507{
508 // received a response from the icache: execute the received
509 // instruction
510 assert(!pkt->isError());
511 assert(_status == IcacheWaitResponse);
512
513 _status = Running;
514
487 previousTick = curTick;
488}
489
490
491void
492TimingSimpleCPU::advanceInst(Fault fault)
493{
494 advancePC(fault);

--- 12 unchanged lines hidden (view full) ---

507{
508 // received a response from the icache: execute the received
509 // instruction
510 assert(!pkt->isError());
511 assert(_status == IcacheWaitResponse);
512
513 _status = Running;
514
515 numCycles += curTick - previousTick;
515 numCycles += tickToCycles(curTick - previousTick);
516 previousTick = curTick;
517
518 if (getState() == SimObject::Draining) {
519 delete pkt->req;
520 delete pkt;
521
522 completeDrain();
523 return;

--- 100 unchanged lines hidden (view full) ---

624TimingSimpleCPU::completeDataAccess(PacketPtr pkt)
625{
626 // received a response from the dcache: complete the load or store
627 // instruction
628 assert(!pkt->isError());
629 assert(_status == DcacheWaitResponse);
630 _status = Running;
631
516 previousTick = curTick;
517
518 if (getState() == SimObject::Draining) {
519 delete pkt->req;
520 delete pkt;
521
522 completeDrain();
523 return;

--- 100 unchanged lines hidden (view full) ---

624TimingSimpleCPU::completeDataAccess(PacketPtr pkt)
625{
626 // received a response from the dcache: complete the load or store
627 // instruction
628 assert(!pkt->isError());
629 assert(_status == DcacheWaitResponse);
630 _status = Running;
631
632 numCycles += curTick - previousTick;
632 numCycles += tickToCycles(curTick - previousTick);
633 previousTick = curTick;
634
635 Fault fault = curStaticInst->completeAcc(pkt, this, traceData);
636
637 // keep an instruction count
638 if (fault == NoFault)
639 countInst();
640 else if (traceData) {

--- 133 unchanged lines hidden --- 		633 previousTick = curTick;
634
635 Fault fault = curStaticInst->completeAcc(pkt, this, traceData);
636
637 // keep an instruction count
638 if (fault == NoFault)
639 countInst();
640 else if (traceData) {

--- 133 unchanged lines hidden ---