timing.cc (3349:fec4a86fa212) timing.cc (3387:8f146ac8248f)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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422{
423 return write((uint32_t)data, addr, flags, res);
424}
425
426
427void
428TimingSimpleCPU::fetch()
429{
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 413 unchanged lines hidden (view full) ---

422{
423 return write((uint32_t)data, addr, flags, res);
424}
425
426
427void
428TimingSimpleCPU::fetch()
429{
430 checkForInterrupts();
430 if (!curStaticInst || !curStaticInst->isDelayedCommit())
431 checkForInterrupts();
431
432 Request *ifetch_req = new Request();
433 ifetch_req->setThreadContext(cpu_id, /* thread ID */ 0);
434 Fault fault = setupFetchRequest(ifetch_req);
435
436 ifetch_pkt = new Packet(ifetch_req, Packet::ReadReq, Packet::Broadcast);
437 ifetch_pkt->dataStatic(&inst);
438

--- 310 unchanged lines hidden --- 		432
433 Request *ifetch_req = new Request();
434 ifetch_req->setThreadContext(cpu_id, /* thread ID */ 0);
435 Fault fault = setupFetchRequest(ifetch_req);
436
437 ifetch_pkt = new Packet(ifetch_req, Packet::ReadReq, Packet::Broadcast);
438 ifetch_pkt->dataStatic(&inst);
439

--- 310 unchanged lines hidden ---