timing.cc (11526:5b81895e5d5e) timing.cc (11608:6319a1125f1c)
1/*
2 * Copyright 2014 Google, Inc.
3 * Copyright (c) 2010-2013,2015 ARM Limited
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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404 main_send_state->fragments[1] = pkt2;
405 main_send_state->outstanding = 2;
406 pkt1->senderState = new SplitFragmentSenderState(pkt, 0);
407 pkt2->senderState = new SplitFragmentSenderState(pkt, 1);
408}
409
410Fault
411TimingSimpleCPU::readMem(Addr addr, uint8_t *data,
1/*
2 * Copyright 2014 Google, Inc.
3 * Copyright (c) 2010-2013,2015 ARM Limited
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

--- 395 unchanged lines hidden (view full) ---

404 main_send_state->fragments[1] = pkt2;
405 main_send_state->outstanding = 2;
406 pkt1->senderState = new SplitFragmentSenderState(pkt, 0);
407 pkt2->senderState = new SplitFragmentSenderState(pkt, 1);
408}
409
410Fault
411TimingSimpleCPU::readMem(Addr addr, uint8_t *data,
412 unsigned size, unsigned flags)
412 unsigned size, Request::Flags flags)
413{
414 panic("readMem() is for atomic accesses, and should "
415 "never be called on TimingSimpleCPU.\n");
416}
417
418Fault
413{
414 panic("readMem() is for atomic accesses, and should "
415 "never be called on TimingSimpleCPU.\n");
416}
417
418Fault
419TimingSimpleCPU::initiateMemRead(Addr addr, unsigned size, unsigned flags)
419TimingSimpleCPU::initiateMemRead(Addr addr, unsigned size,
420 Request::Flags flags)
420{
421 SimpleExecContext &t_info = *threadInfo[curThread];
422 SimpleThread* thread = t_info.thread;
423
424 Fault fault;
425 const int asid = 0;
426 const Addr pc = thread->instAddr();
427 unsigned block_size = cacheLineSize();

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484 // memory system takes ownership of packet
485 dcache_pkt = NULL;
486 }
487 return dcache_pkt == NULL;
488}
489
490Fault
491TimingSimpleCPU::writeMem(uint8_t *data, unsigned size,
421{
422 SimpleExecContext &t_info = *threadInfo[curThread];
423 SimpleThread* thread = t_info.thread;
424
425 Fault fault;
426 const int asid = 0;
427 const Addr pc = thread->instAddr();
428 unsigned block_size = cacheLineSize();

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485 // memory system takes ownership of packet
486 dcache_pkt = NULL;
487 }
488 return dcache_pkt == NULL;
489}
490
491Fault
492TimingSimpleCPU::writeMem(uint8_t *data, unsigned size,
492 Addr addr, unsigned flags, uint64_t *res)
493 Addr addr, Request::Flags flags, uint64_t *res)
493{
494 SimpleExecContext &t_info = *threadInfo[curThread];
495 SimpleThread* thread = t_info.thread;
496
497 uint8_t *newData = new uint8_t[size];
498 const int asid = 0;
499 const Addr pc = thread->instAddr();
500 unsigned block_size = cacheLineSize();

--- 506 unchanged lines hidden --- 		494{
495 SimpleExecContext &t_info = *threadInfo[curThread];
496 SimpleThread* thread = t_info.thread;
497
498 uint8_t *newData = new uint8_t[size];
499 const int asid = 0;
500 const Addr pc = thread->instAddr();
501 unsigned block_size = cacheLineSize();

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