timing.cc (10030:b531e328342d) timing.cc (10031:79d034cd6ba3)
1/*
2 * Copyright (c) 2010-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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467 return dcache_pkt == NULL;
468}
469
470Fault
471TimingSimpleCPU::writeMem(uint8_t *data, unsigned size,
472 Addr addr, unsigned flags, uint64_t *res)
473{
474 uint8_t *newData = new uint8_t[size];
1/*
2 * Copyright (c) 2010-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 458 unchanged lines hidden (view full) ---

467 return dcache_pkt == NULL;
468}
469
470Fault
471TimingSimpleCPU::writeMem(uint8_t *data, unsigned size,
472 Addr addr, unsigned flags, uint64_t *res)
473{
474 uint8_t *newData = new uint8_t[size];
475 memcpy(newData, data, size);
476
477 const int asid = 0;
478 const ThreadID tid = 0;
479 const Addr pc = thread->instAddr();
480 unsigned block_size = cacheLineSize();
481 BaseTLB::Mode mode = BaseTLB::Write;
482
475 const int asid = 0;
476 const ThreadID tid = 0;
477 const Addr pc = thread->instAddr();
478 unsigned block_size = cacheLineSize();
479 BaseTLB::Mode mode = BaseTLB::Write;
480
481 if (data == NULL) {
482 assert(flags & Request::CACHE_BLOCK_ZERO);
483 // This must be a cache block cleaning request
484 memset(newData, 0, size);
485 } else {
486 memcpy(newData, data, size);
487 }
488
483 if (traceData) {
484 traceData->setAddr(addr);
485 }
486
487 RequestPtr req = new Request(asid, addr, size,
488 flags, dataMasterId(), pc, _cpuId, tid);
489
490 req->taskId(taskId());

--- 446 unchanged lines hidden --- 		489 if (traceData) {
490 traceData->setAddr(addr);
491 }
492
493 RequestPtr req = new Request(asid, addr, size,
494 flags, dataMasterId(), pc, _cpuId, tid);
495
496 req->taskId(taskId());

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