1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 413 unchanged lines hidden (view full) --- 422{ 423 return write((uint32_t)data, addr, flags, res); 424} 425 426 427void 428TimingSimpleCPU::fetch() 429{ |
430 if (!curStaticInst || !curStaticInst->isDelayedCommit()) 431 checkForInterrupts(); |
432 433 Request *ifetch_req = new Request(); 434 ifetch_req->setThreadContext(cpu_id, /* thread ID */ 0); 435 Fault fault = setupFetchRequest(ifetch_req); 436 437 ifetch_pkt = new Packet(ifetch_req, Packet::ReadReq, Packet::Broadcast); 438 ifetch_pkt->dataStatic(&inst); 439 --- 310 unchanged lines hidden --- |