1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 177 unchanged lines hidden (view full) --- 186 for (int i = 0; i < threadContexts.size(); ++i) { 187 ThreadContext *tc = threadContexts[i]; 188 if (tc->status() == ThreadContext::Active && _status != Running) { 189 _status = Running; 190 break; 191 } 192 } 193 |
194 if (_status != Running) { 195 _status = Idle; 196 } 197 |
198 Port *peer; 199 if (icachePort.getPeer() == NULL) { |
200 peer = oldCPU->getPort("icache_port")->getPeer(); |
201 icachePort.setPeer(peer); 202 } else { 203 peer = icachePort.getPeer(); 204 } 205 peer->setPeer(&icachePort); 206 207 if (dcachePort.getPeer() == NULL) { |
208 peer = oldCPU->getPort("dcache_port")->getPeer(); |
209 dcachePort.setPeer(peer); 210 } else { 211 peer = dcachePort.getPeer(); 212 } 213 peer->setPeer(&dcachePort); 214} 215 216 --- 327 unchanged lines hidden (view full) --- 544 // instruction 545 assert(pkt->result == Packet::Success); 546 assert(_status == DcacheWaitResponse); 547 _status = Running; 548 549 numCycles += curTick - previousTick; 550 previousTick = curTick; 551 |
552 Fault fault = curStaticInst->completeAcc(pkt, this, traceData); 553 554 delete pkt->req; 555 delete pkt; 556 557 postExecute(); |
558 559 if (getState() == SimObject::Draining) { 560 advancePC(fault); 561 completeDrain(); 562 563 return; 564 } 565 |
566 advanceInst(fault); 567} 568 569 570void 571TimingSimpleCPU::completeDrain() 572{ 573 DPRINTF(Config, "Done draining\n"); --- 138 unchanged lines hidden --- |