722,725c722,724
< if (!pkt->wasNacked()) {
< DPRINTF(SimpleCPU, "Received timing response %#x\n", pkt->getAddr());
< // delay processing of returned data until next CPU clock edge
< Tick next_tick = cpu->nextCycle(curTick());
---
> DPRINTF(SimpleCPU, "Received timing response %#x\n", pkt->getAddr());
> // delay processing of returned data until next CPU clock edge
> Tick next_tick = cpu->nextCycle();
727,730c726,729
< if (next_tick == curTick())
< cpu->completeIfetch(pkt);
< else
< tickEvent.schedule(pkt, next_tick);
---
> if (next_tick == curTick())
> cpu->completeIfetch(pkt);
> else
> tickEvent.schedule(pkt, next_tick);
732,741d730
< return true;
< } else {
< assert(cpu->_status == IcacheWaitResponse);
< pkt->reinitNacked();
< if (!sendTimingReq(pkt)) {
< cpu->_status = IcacheRetry;
< cpu->ifetch_pkt = pkt;
< }
< }
<
842,844c831,832
< if (!pkt->wasNacked()) {
< // delay processing of returned data until next CPU clock edge
< Tick next_tick = cpu->nextCycle(curTick());
---
> // delay processing of returned data until next CPU clock edge
> Tick next_tick = cpu->nextCycle();
846,847c834,838
< if (next_tick == curTick()) {
< cpu->completeDataAccess(pkt);
---
> if (next_tick == curTick()) {
> cpu->completeDataAccess(pkt);
> } else {
> if (!tickEvent.scheduled()) {
> tickEvent.schedule(pkt, next_tick);
849,858c840,845
< if (!tickEvent.scheduled()) {
< tickEvent.schedule(pkt, next_tick);
< } else {
< // In the case of a split transaction and a cache that is
< // faster than a CPU we could get two responses before
< // next_tick expires
< if (!retryEvent.scheduled())
< cpu->schedule(retryEvent, next_tick);
< return false;
< }
---
> // In the case of a split transaction and a cache that is
> // faster than a CPU we could get two responses before
> // next_tick expires
> if (!retryEvent.scheduled())
> cpu->schedule(retryEvent, next_tick);
> return false;
860,868d846
<
< return true;
< } else {
< assert(cpu->_status == DcacheWaitResponse);
< pkt->reinitNacked();
< if (!sendTimingReq(pkt)) {
< cpu->_status = DcacheRetry;
< cpu->dcache_pkt = pkt;
< }