timing.cc (2856:89691405ec9c) | timing.cc (2857:5f3e107e8f13) |
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1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 438 unchanged lines hidden (view full) --- 447 advanceInst(fault); 448 } 449} 450 451 452bool 453TimingSimpleCPU::IcachePort::recvTiming(Packet *pkt) 454{ | 1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 438 unchanged lines hidden (view full) --- 447 advanceInst(fault); 448 } 449} 450 451 452bool 453TimingSimpleCPU::IcachePort::recvTiming(Packet *pkt) 454{ |
455 if (cpu->_status == DcacheWaitResponse) 456 cpu->completeDataAccess(pkt); 457 else if (cpu->_status == IcacheWaitResponse) 458 cpu->completeIfetch(pkt); 459 else 460 assert("OOPS" && 0); | 455 cpu->completeIfetch(pkt); |
461 return true; 462} 463 464void 465TimingSimpleCPU::IcachePort::recvRetry() 466{ 467 // we shouldn't get a retry unless we have a packet that we're 468 // waiting to transmit --- 162 unchanged lines hidden --- | 456 return true; 457} 458 459void 460TimingSimpleCPU::IcachePort::recvRetry() 461{ 462 // we shouldn't get a retry unless we have a packet that we're 463 // waiting to transmit --- 162 unchanged lines hidden --- |