1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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257 } else {
258 _status = DcacheWaitResponse;
259 // memory system takes ownership of packet
260 dcache_pkt = NULL;
261 }
262 return dcache_pkt == NULL;
263}
264
265template <class T>
266Fault
267TimingSimpleCPU::read(Addr addr, T &data, unsigned flags)
268{
269 Fault fault;
270 const int asid = 0;
271 const int thread_id = 0;
272 const Addr pc = thread->readPC();
273
274 PacketPtr pkt;
275 RequestPtr req;
276
277 int block_size = dcachePort.peerBlockSize();
278 int data_size = sizeof(T);
279
280 Addr second_addr = roundDown(addr + data_size - 1, block_size);
281
282 if (second_addr > addr) {
283 Addr first_size = second_addr - addr;
284 Addr second_size = data_size - first_size;
285 // Make sure we'll only need two accesses.
286 assert(roundDown(second_addr + second_size - 1, block_size) ==
287 second_addr);
288
289 /*
290 * Do the translations. If something isn't going to work, find out
291 * before we waste time setting up anything else.
292 */
293 req = new Request(asid, addr, first_size,
294 flags, pc, _cpuId, thread_id);
295 fault = thread->translateDataReadReq(req);
296 if (fault != NoFault) {
297 delete req;
298 return fault;
299 }
300 Request *second_req =
301 new Request(asid, second_addr, second_size,
302 flags, pc, _cpuId, thread_id);
303 fault = thread->translateDataReadReq(second_req);
304 if (fault != NoFault) {
305 delete req;
306 delete second_req;
307 return fault;
308 }
309
310 T * data_ptr = new T;
311
312 /*
313 * This is the big packet that will hold the data we've gotten so far,
314 * if any, and also act as the response we actually give to the
315 * instruction.
316 */
317 Request *orig_req =
318 new Request(asid, addr, data_size, flags, pc, _cpuId, thread_id);
319 orig_req->setPhys(req->getPaddr(), data_size, flags);
320 PacketPtr big_pkt =
321 new Packet(orig_req, MemCmd::ReadResp, Packet::Broadcast);
322 big_pkt->dataDynamic<T>(data_ptr);
323 SplitMainSenderState * main_send_state = new SplitMainSenderState;
324 big_pkt->senderState = main_send_state;
325 main_send_state->outstanding = 2;
326
327 // This is the packet we'll process now.
328 pkt = new Packet(req, MemCmd::ReadReq, Packet::Broadcast);
329 pkt->dataStatic<uint8_t>((uint8_t *)data_ptr);
330 pkt->senderState = new SplitFragmentSenderState(big_pkt, 0);
331
332 // This is the second half of the access we'll deal with later.
333 PacketPtr second_pkt =
334 new Packet(second_req, MemCmd::ReadReq, Packet::Broadcast);
335 second_pkt->dataStatic<uint8_t>((uint8_t *)data_ptr + first_size);
336 second_pkt->senderState = new SplitFragmentSenderState(big_pkt, 1);
337 if (!handleReadPacket(pkt)) {
338 main_send_state->fragments[1] = second_pkt;
339 } else {
340 handleReadPacket(second_pkt);
341 }
342 } else {
343 req = new Request(asid, addr, data_size,
344 flags, pc, _cpuId, thread_id);
345
346 // translate to physical address
347 Fault fault = thread->translateDataReadReq(req);
348
349 if (fault != NoFault) {
350 delete req;
351 return fault;
352 }
353
354 pkt = new Packet(req,
355 (req->isLocked() ?
356 MemCmd::LoadLockedReq : MemCmd::ReadReq),
357 Packet::Broadcast);
358 pkt->dataDynamic<T>(new T);
359
360 handleReadPacket(pkt);
361 }
362
363 if (traceData) {
364 traceData->setData(data);
365 traceData->setAddr(addr);

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463}
464
465template <class T>
466Fault
467TimingSimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res)
468{
469 const int asid = 0;
470 const int thread_id = 0;
471 bool do_access = true; // flag to suppress cache access
472 const Addr pc = thread->readPC();
473
474 RequestPtr req;
475
476 int block_size = dcachePort.peerBlockSize();
477 int data_size = sizeof(T);
478
479 Addr second_addr = roundDown(addr + data_size - 1, block_size);
480
481 if (second_addr > addr) {
482 Fault fault;
483 Addr first_size = second_addr - addr;
484 Addr second_size = data_size - first_size;
485 // Make sure we'll only need two accesses.
486 assert(roundDown(second_addr + second_size - 1, block_size) ==
487 second_addr);
488
489 req = new Request(asid, addr, first_size,
490 flags, pc, _cpuId, thread_id);
491 fault = thread->translateDataWriteReq(req);
492 if (fault != NoFault) {
493 delete req;
494 return fault;
495 }
496 RequestPtr second_req = new Request(asid, second_addr, second_size,
497 flags, pc, _cpuId, thread_id);
498 fault = thread->translateDataWriteReq(second_req);
499 if (fault != NoFault) {
500 delete req;
501 delete second_req;
502 return fault;
503 }
504
505 if (req->isLocked() || req->isSwap() ||
506 second_req->isLocked() || second_req->isSwap()) {
507 panic("LL/SCs and swaps can't be split.");
508 }
509
510 T * data_ptr = new T;
511
512 /*
513 * This is the big packet that will hold the data we've gotten so far,
514 * if any, and also act as the response we actually give to the
515 * instruction.
516 */
517 RequestPtr orig_req =
518 new Request(asid, addr, data_size, flags, pc, _cpuId, thread_id);
519 orig_req->setPhys(req->getPaddr(), data_size, flags);
520 PacketPtr big_pkt =
521 new Packet(orig_req, MemCmd::WriteResp, Packet::Broadcast);
522 big_pkt->dataDynamic<T>(data_ptr);
523 big_pkt->set(data);
524 SplitMainSenderState * main_send_state = new SplitMainSenderState;
525 big_pkt->senderState = main_send_state;
526 main_send_state->outstanding = 2;
527
528 assert(dcache_pkt == NULL);
529 // This is the packet we'll process now.
530 dcache_pkt = new Packet(req, MemCmd::WriteReq, Packet::Broadcast);
531 dcache_pkt->dataStatic<uint8_t>((uint8_t *)data_ptr);
532 dcache_pkt->senderState = new SplitFragmentSenderState(big_pkt, 0);
533
534 // This is the second half of the access we'll deal with later.
535 PacketPtr second_pkt =
536 new Packet(second_req, MemCmd::WriteReq, Packet::Broadcast);
537 second_pkt->dataStatic<uint8_t>((uint8_t *)data_ptr + first_size);
538 second_pkt->senderState = new SplitFragmentSenderState(big_pkt, 1);
539 if (!handleWritePacket()) {
540 main_send_state->fragments[1] = second_pkt;
541 } else {
542 dcache_pkt = second_pkt;
543 handleWritePacket();
544 }
545 } else {
546 req = new Request(asid, addr, data_size, flags, pc, _cpuId, thread_id);
547
548 // translate to physical address
549 Fault fault = thread->translateDataWriteReq(req);
550 if (fault != NoFault) {
551 delete req;
552 return fault;
553 }
554
555 MemCmd cmd = MemCmd::WriteReq; // default
556
557 if (req->isLocked()) {
558 cmd = MemCmd::StoreCondReq;
559 do_access = TheISA::handleLockedWrite(thread, req);
560 } else if (req->isSwap()) {
561 cmd = MemCmd::SwapReq;
562 if (req->isCondSwap()) {
563 assert(res);
564 req->setExtraData(*res);
565 }
566 }
567
568 // Note: need to allocate dcache_pkt even if do_access is
569 // false, as it's used unconditionally to call completeAcc().
570 assert(dcache_pkt == NULL);
571 dcache_pkt = new Packet(req, cmd, Packet::Broadcast);
572 dcache_pkt->allocate();
573 if (req->isMmapedIpr())
574 dcache_pkt->set(htog(data));
575 else
576 dcache_pkt->set(data);
577
578 if (do_access)
579 handleWritePacket();

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