1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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99void
100TimingSimpleCPU::CpuPort::TickEvent::schedule(PacketPtr _pkt, Tick t)
101{
102 pkt = _pkt;
103 Event::schedule(t);
104}
105
106TimingSimpleCPU::TimingSimpleCPU(Params *p)
107 : BaseSimpleCPU(p), icachePort(this, p->clock), dcachePort(this, p->clock),
108 cpu_id(p->cpu_id)
109{
110 _status = Idle;
111
112 icachePort.snoopRangeSent = false;
113 dcachePort.snoopRangeSent = false;
114
115 ifetch_pkt = dcache_pkt = NULL;
116 drainEvent = NULL;

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202 _status = Running;
203 break;
204 }
205 }
206
207 if (_status != Running) {
208 _status = Idle;
209 }
210 previousTick = curTick;
211}
212
213
214void
215TimingSimpleCPU::activateContext(int thread_num, int delay)
216{
217 assert(thread_num == 0);

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244
245
246template <class T>
247Fault
248TimingSimpleCPU::read(Addr addr, T &data, unsigned flags)
249{
250 Request *req =
251 new Request(/* asid */ 0, addr, sizeof(T), flags, thread->readPC(),
252 cpu_id, /* thread ID */ 0);
253
254 if (traceData) {
255 traceData->setAddr(req->getVaddr());
256 }
257
258 // translate to physical address
259 Fault fault = thread->translateDataReadReq(req);
260

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344
345
346template <class T>
347Fault
348TimingSimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res)
349{
350 Request *req =
351 new Request(/* asid */ 0, addr, sizeof(T), flags, thread->readPC(),
352 cpu_id, /* thread ID */ 0);
353
354 if (traceData) {
355 traceData->setAddr(req->getVaddr());
356 }
357
358 // translate to physical address
359 Fault fault = thread->translateDataWriteReq(req);
360

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469
470void
471TimingSimpleCPU::fetch()
472{
473 if (!curStaticInst || !curStaticInst->isDelayedCommit())
474 checkForInterrupts();
475
476 Request *ifetch_req = new Request();
477 ifetch_req->setThreadContext(cpu_id, /* thread ID */ 0);
478 Fault fault = setupFetchRequest(ifetch_req);
479
480 ifetch_pkt = new Packet(ifetch_req, MemCmd::ReadReq, Packet::Broadcast);
481 ifetch_pkt->dataStatic(&inst);
482
483 if (fault == NoFault) {
484 if (!icachePort.sendTiming(ifetch_pkt)) {
485 // Need to wait for retry

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