1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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660 Param<Tick> progress_interval;
661 SimObjectParam<System *> system;
662 Param<int> cpu_id;
663
664#if FULL_SYSTEM
665 SimObjectParam<TheISA::ITB *> itb;
666 SimObjectParam<TheISA::DTB *> dtb;
667 Param<Tick> profile;
668#else
669 SimObjectParam<Process *> workload;
670#endif // FULL_SYSTEM
671
672 Param<int> clock;
673
674 Param<bool> defer_registration;
675 Param<int> width;

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692 INIT_PARAM(progress_interval, "Progress interval"),
693 INIT_PARAM(system, "system object"),
694 INIT_PARAM(cpu_id, "processor ID"),
695
696#if FULL_SYSTEM
697 INIT_PARAM(itb, "Instruction TLB"),
698 INIT_PARAM(dtb, "Data TLB"),
699 INIT_PARAM(profile, ""),
700#else
701 INIT_PARAM(workload, "processes to run"),
702#endif // FULL_SYSTEM
703
704 INIT_PARAM(clock, "clock speed"),
705 INIT_PARAM(defer_registration, "defer system registration (for sampling)"),
706 INIT_PARAM(width, "cpu width"),
707 INIT_PARAM(function_trace, "Enable function trace"),

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727 params->functionTraceStart = function_trace_start;
728 params->system = system;
729 params->cpu_id = cpu_id;
730
731#if FULL_SYSTEM
732 params->itb = itb;
733 params->dtb = dtb;
734 params->profile = profile;
735#else
736 params->process = workload;
737#endif
738
739 TimingSimpleCPU *cpu = new TimingSimpleCPU(params);
740 return cpu;
741}
742
743REGISTER_SIM_OBJECT("TimingSimpleCPU", TimingSimpleCPU)
744