1/*
2 * Copyright 2014 Google, Inc.
3 * Copyright (c) 2010-2013,2015,2017-2018 ARM Limited
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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559
560 // Translation faults will be returned via finishTranslation()
561 return NoFault;
562}
563
564Fault
565TimingSimpleCPU::initiateMemAMO(Addr addr, unsigned size,
566 Request::Flags flags,
567 AtomicOpFunctor *amo_op)
568{
569 SimpleExecContext &t_info = *threadInfo[curThread];
570 SimpleThread* thread = t_info.thread;
571
572 Fault fault;
573 const int asid = 0;
574 const Addr pc = thread->instAddr();
575 unsigned block_size = cacheLineSize();
576 BaseTLB::Mode mode = BaseTLB::Write;
577
578 if (traceData)
579 traceData->setMem(addr, size, flags);
580
581 RequestPtr req = make_shared<Request>(asid, addr, size, flags,
582 dataMasterId(), pc, thread->contextId(), amo_op);
583
584 assert(req->hasAtomicOpFunctor());
585
586 req->taskId(taskId());
587
588 Addr split_addr = roundDown(addr + size - 1, block_size);
589
590 // AMO requests that access across a cache line boundary are not

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