1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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82 TheISA::initCPU(tc, _cpuId);
83 }
84
85 // Initialise the ThreadContext's memory proxies
86 tcBase()->initMemProxies(tcBase());
87#endif
88}
89
90void
91TimingSimpleCPU::TimingCPUPort::TickEvent::schedule(PacketPtr _pkt, Tick t)
92{
93 pkt = _pkt;
94 cpu->schedule(this, t);
95}
96
97TimingSimpleCPU::TimingSimpleCPU(TimingSimpleCPUParams *p)
98 : BaseSimpleCPU(p), fetchTranslation(this), icachePort(this),
99 dcachePort(this), fetchEvent(this)
100{
101 _status = Idle;
102
103 ifetch_pkt = dcache_pkt = NULL;
104 drainEvent = NULL;
105 previousTick = 0;
106 changeState(SimObject::Running);
107 system->totalNumInsts = 0;
108}
109
110

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