exec_context.hh (13652:45d94ac03a27) exec_context.hh (13900:d4bcfecd871e)
1/*
2 * Copyright (c) 2014-2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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561 cpu->mwaitAtomic(thread->threadId(), tc, thread->dtb);
562 }
563
564 AddressMonitor *
565 getAddrMonitor() override
566 {
567 return cpu->getCpuAddrMonitor(thread->threadId());
568 }
1/*
2 * Copyright (c) 2014-2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 552 unchanged lines hidden (view full) ---

561 cpu->mwaitAtomic(thread->threadId(), tc, thread->dtb);
562 }
563
564 AddressMonitor *
565 getAddrMonitor() override
566 {
567 return cpu->getCpuAddrMonitor(thread->threadId());
568 }
569
570#if THE_ISA == MIPS_ISA
571 RegVal
572 readRegOtherThread(const RegId& reg, ThreadID tid=InvalidThreadID)
573 override
574 {
575 panic("Simple CPU models do not support multithreaded "
576 "register access.");
577 }
578
579 void
580 setRegOtherThread(const RegId& reg, RegVal val,
581 ThreadID tid=InvalidThreadID) override
582 {
583 panic("Simple CPU models do not support multithreaded "
584 "register access.");
585 }
586#endif
587
588};
589
590#endif // __CPU_EXEC_CONTEXT_HH__
569};
570
571#endif // __CPU_EXEC_CONTEXT_HH__