52a53
> #include "cpu/reg_class.hh"
167c168,170
< return thread->readIntReg(si->srcRegIdx(idx));
---
> RegId reg = si->srcRegIdx(idx);
> assert(reg.regClass == IntRegClass);
> return thread->readIntReg(reg.regIdx);
174c177,179
< thread->setIntReg(si->destRegIdx(idx), val);
---
> RegId reg = si->destRegIdx(idx);
> assert(reg.regClass == IntRegClass);
> thread->setIntReg(reg.regIdx, val);
181,182c186,188
< int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Reg_Base;
< return thread->readFloatReg(reg_idx);
---
> RegId reg = si->srcRegIdx(idx);
> assert(reg.regClass == FloatRegClass);
> return thread->readFloatReg(reg.regIdx);
190,191c196,198
< int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Reg_Base;
< return thread->readFloatRegBits(reg_idx);
---
> RegId reg = si->srcRegIdx(idx);
> assert(reg.regClass == FloatRegClass);
> return thread->readFloatRegBits(reg.regIdx);
199,200c206,208
< int reg_idx = si->destRegIdx(idx) - TheISA::FP_Reg_Base;
< thread->setFloatReg(reg_idx, val);
---
> RegId reg = si->destRegIdx(idx);
> assert(reg.regClass == FloatRegClass);
> thread->setFloatReg(reg.regIdx, val);
209,210c217,219
< int reg_idx = si->destRegIdx(idx) - TheISA::FP_Reg_Base;
< thread->setFloatRegBits(reg_idx, val);
---
> RegId reg = si->destRegIdx(idx);
> assert(reg.regClass == FloatRegClass);
> thread->setFloatRegBits(reg.regIdx, val);
216,217c225,227
< int reg_idx = si->srcRegIdx(idx) - TheISA::CC_Reg_Base;
< return thread->readCCReg(reg_idx);
---
> RegId reg = si->srcRegIdx(idx);
> assert(reg.regClass == CCRegClass);
> return thread->readCCReg(reg.regIdx);
223,224c233,235
< int reg_idx = si->destRegIdx(idx) - TheISA::CC_Reg_Base;
< thread->setCCReg(reg_idx, val);
---
> RegId reg = si->destRegIdx(idx);
> assert(reg.regClass == CCRegClass);
> thread->setCCReg(reg.regIdx, val);
230,231c241,243
< int reg_idx = si->srcRegIdx(idx) - TheISA::Misc_Reg_Base;
< return thread->readMiscReg(reg_idx);
---
> RegId reg = si->srcRegIdx(idx);
> assert(reg.regClass == MiscRegClass);
> return thread->readMiscReg(reg.regIdx);
238,239c250,252
< int reg_idx = si->destRegIdx(idx) - TheISA::Misc_Reg_Base;
< thread->setMiscReg(reg_idx, val);
---
> RegId reg = si->destRegIdx(idx);
> assert(reg.regClass == MiscRegClass);
> thread->setMiscReg(reg.regIdx, val);
401c414
< MiscReg readRegOtherThread(int regIdx, ThreadID tid = InvalidThreadID)
---
> MiscReg readRegOtherThread(RegId reg, ThreadID tid = InvalidThreadID)
408c421
< void setRegOtherThread(int regIdx, MiscReg val,
---
> void setRegOtherThread(RegId reg, MiscReg val,