base.hh (7725:00ea9430643b) | base.hh (7764:03efcdc3421f) |
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1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 177 unchanged lines hidden (view full) --- 186 thread->funcExeInst++; 187 } 188 189 virtual Counter totalInstructions() const 190 { 191 return numInst - startNumInst; 192 } 193 | 1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 177 unchanged lines hidden (view full) --- 186 thread->funcExeInst++; 187 } 188 189 virtual Counter totalInstructions() const 190 { 191 return numInst - startNumInst; 192 } 193 |
194 // Mask to align PCs to MachInst sized boundaries 195 static const Addr PCMask = ~((Addr)sizeof(TheISA::MachInst) - 1); 196 | |
197 // number of simulated memory references 198 Stats::Scalar numMemRefs; 199 200 // number of simulated loads 201 Counter numLoad; 202 Counter startNumLoad; 203 204 // number of idle cycles --- 183 unchanged lines hidden --- | 194 // number of simulated memory references 195 Stats::Scalar numMemRefs; 196 197 // number of simulated loads 198 Counter numLoad; 199 Counter startNumLoad; 200 201 // number of idle cycles --- 183 unchanged lines hidden --- |