base.hh (5496:6899b894166f) | base.hh (5529:9ae69b9cd7fd) |
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1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 62 unchanged lines hidden (view full) --- 71} 72class ThreadContext; 73class Checkpoint; 74 75namespace Trace { 76 class InstRecord; 77} 78 | 1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 62 unchanged lines hidden (view full) --- 71} 72class ThreadContext; 73class Checkpoint; 74 75namespace Trace { 76 class InstRecord; 77} 78 |
79class BaseSimpleCPUParams; |
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79 | 80 |
81 |
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80class BaseSimpleCPU : public BaseCPU 81{ 82 protected: 83 typedef TheISA::MiscReg MiscReg; 84 typedef TheISA::FloatReg FloatReg; 85 typedef TheISA::FloatRegBits FloatRegBits; 86 87 protected: --- 14 unchanged lines hidden (view full) --- 102 static int warned = 0; 103 if (!warned) { 104 warn ("WH64 is not implemented"); 105 warned = 1; 106 } 107 }; 108 109 public: | 82class BaseSimpleCPU : public BaseCPU 83{ 84 protected: 85 typedef TheISA::MiscReg MiscReg; 86 typedef TheISA::FloatReg FloatReg; 87 typedef TheISA::FloatRegBits FloatRegBits; 88 89 protected: --- 14 unchanged lines hidden (view full) --- 104 static int warned = 0; 105 if (!warned) { 106 warn ("WH64 is not implemented"); 107 warned = 1; 108 } 109 }; 110 111 public: |
110 struct Params : public BaseCPU::Params 111 { 112 TheISA::ITB *itb; 113 TheISA::DTB *dtb; 114#if !FULL_SYSTEM 115 Process *process; 116#endif 117 }; 118 BaseSimpleCPU(Params *params); | 112 BaseSimpleCPU(BaseSimpleCPUParams *params); |
119 virtual ~BaseSimpleCPU(); 120 121 public: 122 /** SimpleThread object, provides all the architectural state. */ 123 SimpleThread *thread; 124 125 /** ThreadContext object, provides an interface for external 126 * objects to modify this thread's state. --- 307 unchanged lines hidden --- | 113 virtual ~BaseSimpleCPU(); 114 115 public: 116 /** SimpleThread object, provides all the architectural state. */ 117 SimpleThread *thread; 118 119 /** ThreadContext object, provides an interface for external 120 * objects to modify this thread's state. --- 307 unchanged lines hidden --- |