base.hh (4050:cf1daaef9109) base.hh (4172:141705d83494)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 270 unchanged lines hidden (view full) ---

279 uint64_t readPC() { return thread->readPC(); }
280 uint64_t readNextPC() { return thread->readNextPC(); }
281 uint64_t readNextNPC() { return thread->readNextNPC(); }
282
283 void setPC(uint64_t val) { thread->setPC(val); }
284 void setNextPC(uint64_t val) { thread->setNextPC(val); }
285 void setNextNPC(uint64_t val) { thread->setNextNPC(val); }
286
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 270 unchanged lines hidden (view full) ---

279 uint64_t readPC() { return thread->readPC(); }
280 uint64_t readNextPC() { return thread->readNextPC(); }
281 uint64_t readNextNPC() { return thread->readNextNPC(); }
282
283 void setPC(uint64_t val) { thread->setPC(val); }
284 void setNextPC(uint64_t val) { thread->setNextPC(val); }
285 void setNextNPC(uint64_t val) { thread->setNextNPC(val); }
286
287 MiscReg readMiscRegNoEffect(int misc_reg)
288 {
289 return thread->readMiscRegNoEffect(misc_reg);
290 }
291
287 MiscReg readMiscReg(int misc_reg)
288 {
289 return thread->readMiscReg(misc_reg);
290 }
291
292 MiscReg readMiscReg(int misc_reg)
293 {
294 return thread->readMiscReg(misc_reg);
295 }
296
292 MiscReg readMiscRegWithEffect(int misc_reg)
297 void setMiscRegNoEffect(int misc_reg, const MiscReg &val)
293 {
298 {
294 return thread->readMiscRegWithEffect(misc_reg);
299 return thread->setMiscRegNoEffect(misc_reg, val);
295 }
296
297 void setMiscReg(int misc_reg, const MiscReg &val)
298 {
299 return thread->setMiscReg(misc_reg, val);
300 }
301
300 }
301
302 void setMiscReg(int misc_reg, const MiscReg &val)
303 {
304 return thread->setMiscReg(misc_reg, val);
305 }
306
302 void setMiscRegWithEffect(int misc_reg, const MiscReg &val)
303 {
304 return thread->setMiscRegWithEffect(misc_reg, val);
305 }
306
307 MiscReg readMiscRegOperand(const StaticInst *si, int idx)
308 {
309 int reg_idx = si->srcRegIdx(idx) - TheISA::Ctrl_Base_DepTag;
307 MiscReg readMiscRegOperand(const StaticInst *si, int idx)
308 {
309 int reg_idx = si->srcRegIdx(idx) - TheISA::Ctrl_Base_DepTag;
310 return thread->readMiscReg(reg_idx);
310 return thread->readMiscRegNoEffect(reg_idx);
311 }
312
313 MiscReg readMiscRegOperandWithEffect(const StaticInst *si, int idx)
314 {
315 int reg_idx = si->srcRegIdx(idx) - TheISA::Ctrl_Base_DepTag;
311 }
312
313 MiscReg readMiscRegOperandWithEffect(const StaticInst *si, int idx)
314 {
315 int reg_idx = si->srcRegIdx(idx) - TheISA::Ctrl_Base_DepTag;
316 return thread->readMiscRegWithEffect(reg_idx);
316 return thread->readMiscReg(reg_idx);
317 }
318
319 void setMiscRegOperand(const StaticInst *si, int idx, const MiscReg &val)
320 {
321 int reg_idx = si->destRegIdx(idx) - TheISA::Ctrl_Base_DepTag;
317 }
318
319 void setMiscRegOperand(const StaticInst *si, int idx, const MiscReg &val)
320 {
321 int reg_idx = si->destRegIdx(idx) - TheISA::Ctrl_Base_DepTag;
322 return thread->setMiscReg(reg_idx, val);
322 return thread->setMiscRegNoEffect(reg_idx, val);
323 }
324
325 void setMiscRegOperandWithEffect(
326 const StaticInst *si, int idx, const MiscReg &val)
327 {
328 int reg_idx = si->destRegIdx(idx) - TheISA::Ctrl_Base_DepTag;
323 }
324
325 void setMiscRegOperandWithEffect(
326 const StaticInst *si, int idx, const MiscReg &val)
327 {
328 int reg_idx = si->destRegIdx(idx) - TheISA::Ctrl_Base_DepTag;
329 return thread->setMiscRegWithEffect(reg_idx, val);
329 return thread->setMiscReg(reg_idx, val);
330 }
331
332 unsigned readStCondFailures() {
333 return thread->readStCondFailures();
334 }
335
336 void setStCondFailures(unsigned sc_failures) {
337 thread->setStCondFailures(sc_failures);

--- 15 unchanged lines hidden --- 		330 }
331
332 unsigned readStCondFailures() {
333 return thread->readStCondFailures();
334 }
335
336 void setStCondFailures(unsigned sc_failures) {
337 thread->setStCondFailures(sc_failures);

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