base.hh (3521:0b0b3551def0) base.hh (3735:86a7cf4dcc11)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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208 // renaming. We find the architectural register index by indexing
209 // into the instruction's own operand index table. Note that a
210 // raw pointer to the StaticInst is provided instead of a
211 // ref-counted StaticInstPtr to redice overhead. This is fine as
212 // long as these methods don't copy the pointer into any long-term
213 // storage (which is pretty hard to imagine they would have reason
214 // to do).
215
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 199 unchanged lines hidden (view full) ---

208 // renaming. We find the architectural register index by indexing
209 // into the instruction's own operand index table. Note that a
210 // raw pointer to the StaticInst is provided instead of a
211 // ref-counted StaticInstPtr to redice overhead. This is fine as
212 // long as these methods don't copy the pointer into any long-term
213 // storage (which is pretty hard to imagine they would have reason
214 // to do).
215
216 uint64_t readIntReg(const StaticInst *si, int idx)
216 uint64_t readIntRegOperand(const StaticInst *si, int idx)
217 {
218 return thread->readIntReg(si->srcRegIdx(idx));
219 }
220
217 {
218 return thread->readIntReg(si->srcRegIdx(idx));
219 }
220
221 FloatReg readFloatReg(const StaticInst *si, int idx, int width)
221 FloatReg readFloatRegOperand(const StaticInst *si, int idx, int width)
222 {
223 int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
224 return thread->readFloatReg(reg_idx, width);
225 }
226
222 {
223 int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
224 return thread->readFloatReg(reg_idx, width);
225 }
226
227 FloatReg readFloatReg(const StaticInst *si, int idx)
227 FloatReg readFloatRegOperand(const StaticInst *si, int idx)
228 {
229 int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
230 return thread->readFloatReg(reg_idx);
231 }
232
228 {
229 int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
230 return thread->readFloatReg(reg_idx);
231 }
232
233 FloatRegBits readFloatRegBits(const StaticInst *si, int idx, int width)
233 FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx,
234 int width)
234 {
235 int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
236 return thread->readFloatRegBits(reg_idx, width);
237 }
238
235 {
236 int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
237 return thread->readFloatRegBits(reg_idx, width);
238 }
239
239 FloatRegBits readFloatRegBits(const StaticInst *si, int idx)
240 FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx)
240 {
241 int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
242 return thread->readFloatRegBits(reg_idx);
243 }
244
241 {
242 int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
243 return thread->readFloatRegBits(reg_idx);
244 }
245
245 void setIntReg(const StaticInst *si, int idx, uint64_t val)
246 void setIntRegOperand(const StaticInst *si, int idx, uint64_t val)
246 {
247 thread->setIntReg(si->destRegIdx(idx), val);
248 }
249
247 {
248 thread->setIntReg(si->destRegIdx(idx), val);
249 }
250
250 void setFloatReg(const StaticInst *si, int idx, FloatReg val, int width)
251 void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val,
252 int width)
251 {
252 int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
253 thread->setFloatReg(reg_idx, val, width);
254 }
255
253 {
254 int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
255 thread->setFloatReg(reg_idx, val, width);
256 }
257
256 void setFloatReg(const StaticInst *si, int idx, FloatReg val)
258 void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val)
257 {
258 int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
259 thread->setFloatReg(reg_idx, val);
260 }
261
259 {
260 int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
261 thread->setFloatReg(reg_idx, val);
262 }
263
262 void setFloatRegBits(const StaticInst *si, int idx,
263 FloatRegBits val, int width)
264 void setFloatRegOperandBits(const StaticInst *si, int idx,
265 FloatRegBits val, int width)
264 {
265 int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
266 thread->setFloatRegBits(reg_idx, val, width);
267 }
268
266 {
267 int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
268 thread->setFloatRegBits(reg_idx, val, width);
269 }
270
269 void setFloatRegBits(const StaticInst *si, int idx, FloatRegBits val)
271 void setFloatRegOperandBits(const StaticInst *si, int idx,
272 FloatRegBits val)
270 {
271 int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
272 thread->setFloatRegBits(reg_idx, val);
273 }
274
275 uint64_t readPC() { return thread->readPC(); }
276 uint64_t readNextPC() { return thread->readNextPC(); }
277 uint64_t readNextNPC() { return thread->readNextNPC(); }

--- 38 unchanged lines hidden --- 		273 {
274 int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
275 thread->setFloatRegBits(reg_idx, val);
276 }
277
278 uint64_t readPC() { return thread->readPC(); }
279 uint64_t readNextPC() { return thread->readNextPC(); }
280 uint64_t readNextNPC() { return thread->readNextNPC(); }

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