base.hh (3468:cf23ad1ceef2) base.hh (3479:4fbcaa81d105)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 65 unchanged lines hidden (view full) ---

74class BaseSimpleCPU : public BaseCPU
75{
76 protected:
77 typedef TheISA::MachInst MachInst;
78 typedef TheISA::MiscReg MiscReg;
79 typedef TheISA::FloatReg FloatReg;
80 typedef TheISA::FloatRegBits FloatRegBits;
81
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 65 unchanged lines hidden (view full) ---

74class BaseSimpleCPU : public BaseCPU
75{
76 protected:
77 typedef TheISA::MachInst MachInst;
78 typedef TheISA::MiscReg MiscReg;
79 typedef TheISA::FloatReg FloatReg;
80 typedef TheISA::FloatRegBits FloatRegBits;
81
82 MemObject *mem;
83
84 protected:
85 Trace::InstRecord *traceData;
86
87 public:
88 void post_interrupt(int int_num, int index);
89
90 void zero_fill_64(Addr addr) {
91 static int warned = 0;
92 if (!warned) {
93 warn ("WH64 is not implemented");
94 warned = 1;
95 }
96 };
97
98 public:
99 struct Params : public BaseCPU::Params
100 {
82 protected:
83 Trace::InstRecord *traceData;
84
85 public:
86 void post_interrupt(int int_num, int index);
87
88 void zero_fill_64(Addr addr) {
89 static int warned = 0;
90 if (!warned) {
91 warn ("WH64 is not implemented");
92 warned = 1;
93 }
94 };
95
96 public:
97 struct Params : public BaseCPU::Params
98 {
101 MemObject *mem;
102#if FULL_SYSTEM
103 TheISA::ITB *itb;
104 TheISA::DTB *dtb;
105#else
106 Process *process;
107#endif
108 };
109 BaseSimpleCPU(Params *params);

--- 210 unchanged lines hidden --- 		99#if FULL_SYSTEM
100 TheISA::ITB *itb;
101 TheISA::DTB *dtb;
102#else
103 Process *process;
104#endif
105 };
106 BaseSimpleCPU(Params *params);

--- 210 unchanged lines hidden ---