base.hh (3454:26850ac19a39) | base.hh (3468:cf23ad1ceef2) |
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1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 274 unchanged lines hidden (view full) --- 283 void setNextPC(uint64_t val) { thread->setNextPC(val); } 284 void setNextNPC(uint64_t val) { thread->setNextNPC(val); } 285 286 MiscReg readMiscReg(int misc_reg) 287 { 288 return thread->readMiscReg(misc_reg); 289 } 290 | 1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 274 unchanged lines hidden (view full) --- 283 void setNextPC(uint64_t val) { thread->setNextPC(val); } 284 void setNextNPC(uint64_t val) { thread->setNextNPC(val); } 285 286 MiscReg readMiscReg(int misc_reg) 287 { 288 return thread->readMiscReg(misc_reg); 289 } 290 |
291 MiscReg readMiscRegWithEffect(int misc_reg, Fault &fault) | 291 MiscReg readMiscRegWithEffect(int misc_reg) |
292 { | 292 { |
293 return thread->readMiscRegWithEffect(misc_reg, fault); | 293 return thread->readMiscRegWithEffect(misc_reg); |
294 } 295 | 294 } 295 |
296 Fault setMiscReg(int misc_reg, const MiscReg &val) | 296 void setMiscReg(int misc_reg, const MiscReg &val) |
297 { 298 return thread->setMiscReg(misc_reg, val); 299 } 300 | 297 { 298 return thread->setMiscReg(misc_reg, val); 299 } 300 |
301 Fault setMiscRegWithEffect(int misc_reg, const MiscReg &val) | 301 void setMiscRegWithEffect(int misc_reg, const MiscReg &val) |
302 { 303 return thread->setMiscRegWithEffect(misc_reg, val); 304 } 305 306#if FULL_SYSTEM 307 Fault hwrei() { return thread->hwrei(); } 308 bool inPalMode() { return thread->inPalMode(); } 309 void ev5_trap(Fault fault) { fault->invoke(tc); } 310 bool simPalCheck(int palFunc) { return thread->simPalCheck(palFunc); } 311#else 312 void syscall(int64_t callnum) { thread->syscall(callnum); } 313#endif 314 315 bool misspeculating() { return thread->misspeculating(); } 316 ThreadContext *tcBase() { return tc; } 317}; 318 319#endif // __CPU_SIMPLE_BASE_HH__ | 302 { 303 return thread->setMiscRegWithEffect(misc_reg, val); 304 } 305 306#if FULL_SYSTEM 307 Fault hwrei() { return thread->hwrei(); } 308 bool inPalMode() { return thread->inPalMode(); } 309 void ev5_trap(Fault fault) { fault->invoke(tc); } 310 bool simPalCheck(int palFunc) { return thread->simPalCheck(palFunc); } 311#else 312 void syscall(int64_t callnum) { thread->syscall(callnum); } 313#endif 314 315 bool misspeculating() { return thread->misspeculating(); } 316 ThreadContext *tcBase() { return tc; } 317}; 318 319#endif // __CPU_SIMPLE_BASE_HH__ |