base.hh (11151:ca4ea9b5c052) base.hh (11168:f98eb2da15a4)
1/*
2 * Copyright (c) 2011-2012,2015 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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88 BPredUnit *branchPred;
89
90 void checkPcEventQueue();
91 void swapActiveThread();
92
93 public:
94 BaseSimpleCPU(BaseSimpleCPUParams *params);
95 virtual ~BaseSimpleCPU();
1/*
2 * Copyright (c) 2011-2012,2015 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

--- 79 unchanged lines hidden (view full) ---

88 BPredUnit *branchPred;
89
90 void checkPcEventQueue();
91 void swapActiveThread();
92
93 public:
94 BaseSimpleCPU(BaseSimpleCPUParams *params);
95 virtual ~BaseSimpleCPU();
96 void wakeup(ThreadID tid) M5_ATTR_OVERRIDE;
96 void wakeup(ThreadID tid) override;
97 virtual void init();
98 public:
99 Trace::InstRecord *traceData;
100 CheckerCPU *checker;
101
102 std::vector<SimpleExecContext*> threadInfo;
103 std::list<ThreadID> activeThreads;
104

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147
148 virtual Fault writeMem(uint8_t* data, unsigned size, Addr addr,
149 unsigned flags, uint64_t* res) = 0;
150
151 void countInst();
152 virtual Counter totalInsts() const;
153 virtual Counter totalOps() const;
154
97 virtual void init();
98 public:
99 Trace::InstRecord *traceData;
100 CheckerCPU *checker;
101
102 std::vector<SimpleExecContext*> threadInfo;
103 std::list<ThreadID> activeThreads;
104

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147
148 virtual Fault writeMem(uint8_t* data, unsigned size, Addr addr,
149 unsigned flags, uint64_t* res) = 0;
150
151 void countInst();
152 virtual Counter totalInsts() const;
153 virtual Counter totalOps() const;
154
155 void serializeThread(CheckpointOut &cp,
156 ThreadID tid) const M5_ATTR_OVERRIDE;
157 void unserializeThread(CheckpointIn &cp, ThreadID tid) M5_ATTR_OVERRIDE;
155 void serializeThread(CheckpointOut &cp, ThreadID tid) const override;
156 void unserializeThread(CheckpointIn &cp, ThreadID tid) override;
158
159};
160
161#endif // __CPU_SIMPLE_BASE_HH__
157
158};
159
160#endif // __CPU_SIMPLE_BASE_HH__