base.hh (10698:829adc48e175) base.hh (10905:a6ca6831e775)
1/*
2 * Copyright (c) 2011-2012 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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273 Stats::Scalar numPredictedBranches;
274 /// Number of misprediced branches
275 Stats::Scalar numBranchMispred;
276 /// @}
277
278 // instruction mix histogram by OpClass
279 Stats::Vector statExecutedInstType;
280
1/*
2 * Copyright (c) 2011-2012 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

--- 264 unchanged lines hidden (view full) ---

273 Stats::Scalar numPredictedBranches;
274 /// Number of misprediced branches
275 Stats::Scalar numBranchMispred;
276 /// @}
277
278 // instruction mix histogram by OpClass
279 Stats::Vector statExecutedInstType;
280
281 void serializeThread(std::ostream &os, ThreadID tid);
282 void unserializeThread(Checkpoint *cp, const std::string &section,
283 ThreadID tid);
281 void serializeThread(CheckpointOut &cp,
282 ThreadID tid) const M5_ATTR_OVERRIDE;
283 void unserializeThread(CheckpointIn &cp, ThreadID tid) M5_ATTR_OVERRIDE;
284
285 // These functions are only used in CPU models that split
286 // effective address computation from the actual memory access.
287 void setEA(Addr EA) { panic("BaseSimpleCPU::setEA() not implemented\n"); }
288 Addr getEA() const { panic("BaseSimpleCPU::getEA() not implemented\n"); }
289
290 // The register accessor methods provide the index of the
291 // instruction's operand (e.g., 0 or 1), not the architectural

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285 // These functions are only used in CPU models that split
286 // effective address computation from the actual memory access.
287 void setEA(Addr EA) { panic("BaseSimpleCPU::setEA() not implemented\n"); }
288 Addr getEA() const { panic("BaseSimpleCPU::getEA() not implemented\n"); }
289
290 // The register accessor methods provide the index of the
291 // instruction's operand (e.g., 0 or 1), not the architectural

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