base.hh (5640:c811ced9efc1) | base.hh (5702:bf84e2fa05f7) |
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1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 399 unchanged lines hidden (view full) --- 408 { 409 panic("Simple CPU models do not support multithreaded " 410 "register access.\n"); 411 } 412 413 //Fault CacheOp(uint8_t Op, Addr EA); 414 415#if FULL_SYSTEM | 1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 399 unchanged lines hidden (view full) --- 408 { 409 panic("Simple CPU models do not support multithreaded " 410 "register access.\n"); 411 } 412 413 //Fault CacheOp(uint8_t Op, Addr EA); 414 415#if FULL_SYSTEM |
416 Fault hwrei() { return thread->hwrei(); } |
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416 void ev5_trap(Fault fault) { fault->invoke(tc); } | 417 void ev5_trap(Fault fault) { fault->invoke(tc); } |
418 bool simPalCheck(int palFunc) { return thread->simPalCheck(palFunc); } |
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417#else 418 void syscall(int64_t callnum) { thread->syscall(callnum); } 419#endif 420 421 bool misspeculating() { return thread->misspeculating(); } 422 ThreadContext *tcBase() { return tc; } 423}; 424 425#endif // __CPU_SIMPLE_BASE_HH__ | 419#else 420 void syscall(int64_t callnum) { thread->syscall(callnum); } 421#endif 422 423 bool misspeculating() { return thread->misspeculating(); } 424 ThreadContext *tcBase() { return tc; } 425}; 426 427#endif // __CPU_SIMPLE_BASE_HH__ |