base.hh (4172:141705d83494) | base.hh (4181:6edaeff44647) |
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1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 60 unchanged lines hidden (view full) --- 69namespace Trace { 70 class InstRecord; 71} 72 73 74class BaseSimpleCPU : public BaseCPU 75{ 76 protected: | 1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 60 unchanged lines hidden (view full) --- 69namespace Trace { 70 class InstRecord; 71} 72 73 74class BaseSimpleCPU : public BaseCPU 75{ 76 protected: |
77 typedef TheISA::MachInst MachInst; | |
78 typedef TheISA::MiscReg MiscReg; 79 typedef TheISA::FloatReg FloatReg; 80 typedef TheISA::FloatRegBits FloatRegBits; 81 82 protected: 83 Trace::InstRecord *traceData; 84 85 public: --- 31 unchanged lines hidden (view full) --- 117 118#if FULL_SYSTEM 119 Addr dbg_vtophys(Addr addr); 120 121 bool interval_stats; 122#endif 123 124 // current instruction | 77 typedef TheISA::MiscReg MiscReg; 78 typedef TheISA::FloatReg FloatReg; 79 typedef TheISA::FloatRegBits FloatRegBits; 80 81 protected: 82 Trace::InstRecord *traceData; 83 84 public: --- 31 unchanged lines hidden (view full) --- 116 117#if FULL_SYSTEM 118 Addr dbg_vtophys(Addr addr); 119 120 bool interval_stats; 121#endif 122 123 // current instruction |
125 MachInst inst; | 124 TheISA::MachInst inst; |
126 | 125 |
126 // current extended machine instruction 127 TheISA::ExtMachInst extMachInst; 128 |
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127 // Static data storage 128 TheISA::LargestRead dataReg; 129 130 StaticInstPtr curStaticInst; 131 StaticInstPtr curMacroStaticInst; 132 133 void checkForInterrupts(); 134 Fault setupFetchRequest(Request *req); --- 218 unchanged lines hidden --- | 129 // Static data storage 130 TheISA::LargestRead dataReg; 131 132 StaticInstPtr curStaticInst; 133 StaticInstPtr curMacroStaticInst; 134 135 void checkForInterrupts(); 136 Fault setupFetchRequest(Request *req); --- 218 unchanged lines hidden --- |