1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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177 Counter numInst;
178 Counter startNumInst;
179 Stats::Scalar numInsts;
180
181 void countInst()
182 {
183 numInst++;
184 numInsts++;
185
186 thread->funcExeInst++;
187 }
188
189 virtual Counter totalInstructions() const
190 {
191 return numInst - startNumInst;
192 }
193
194 // number of simulated memory references
195 Stats::Scalar numMemRefs;
196
197 // number of simulated loads
198 Counter numLoad;
199 Counter startNumLoad;
200
201 // number of idle cycles
202 Stats::Average notIdleFraction;
203 Stats::Formula idleFraction;
204

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235 // raw pointer to the StaticInst is provided instead of a
236 // ref-counted StaticInstPtr to redice overhead. This is fine as
237 // long as these methods don't copy the pointer into any long-term
238 // storage (which is pretty hard to imagine they would have reason
239 // to do).
240
241 uint64_t readIntRegOperand(const StaticInst *si, int idx)
242 {
243 return thread->readIntReg(si->srcRegIdx(idx));
244 }
245
246 FloatReg readFloatRegOperand(const StaticInst *si, int idx)
247 {
248 int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
249 return thread->readFloatReg(reg_idx);
250 }
251
252 FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx)
253 {
254 int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
255 return thread->readFloatRegBits(reg_idx);
256 }
257
258 void setIntRegOperand(const StaticInst *si, int idx, uint64_t val)
259 {
260 thread->setIntReg(si->destRegIdx(idx), val);
261 }
262
263 void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val)
264 {
265 int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
266 thread->setFloatReg(reg_idx, val);
267 }
268
269 void setFloatRegOperandBits(const StaticInst *si, int idx,
270 FloatRegBits val)
271 {
272 int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
273 thread->setFloatRegBits(reg_idx, val);
274 }
275
276 bool readPredicate() { return thread->readPredicate(); }
277 void setPredicate(bool val)
278 {
279 thread->setPredicate(val);

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289
290 MiscReg readMiscRegNoEffect(int misc_reg)
291 {
292 return thread->readMiscRegNoEffect(misc_reg);
293 }
294
295 MiscReg readMiscReg(int misc_reg)
296 {
297 return thread->readMiscReg(misc_reg);
298 }
299
300 void setMiscReg(int misc_reg, const MiscReg &val)
301 {
302 return thread->setMiscReg(misc_reg, val);
303 }
304
305 MiscReg readMiscRegOperand(const StaticInst *si, int idx)
306 {
307 int reg_idx = si->srcRegIdx(idx) - TheISA::Ctrl_Base_DepTag;
308 return thread->readMiscReg(reg_idx);
309 }
310
311 void setMiscRegOperand(
312 const StaticInst *si, int idx, const MiscReg &val)
313 {
314 int reg_idx = si->destRegIdx(idx) - TheISA::Ctrl_Base_DepTag;
315 return thread->setMiscReg(reg_idx, val);
316 }
317
318 void demapPage(Addr vaddr, uint64_t asn)
319 {
320 thread->demapPage(vaddr, asn);
321 }

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