base.cc (5647:b06b49498c79) base.cc (5665:433182bf55c1)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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363#endif // ALPHA_ISA
364
365 // check for instruction-count-based events
366 comInstEventQueue[0]->serviceEvents(numInst);
367
368 // decode the instruction
369 inst = gtoh(inst);
370
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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363#endif // ALPHA_ISA
364
365 // check for instruction-count-based events
366 comInstEventQueue[0]->serviceEvents(numInst);
367
368 // decode the instruction
369 inst = gtoh(inst);
370
371 //If we're not in the middle of a macro instruction
372 if (!curMacroStaticInst) {
371 MicroPC upc = thread->readMicroPC();
373
372
373 if (isRomMicroPC(upc)) {
374 stayAtPC = false;
375 curStaticInst = microcodeRom.fetchMicroop(upc, curMacroStaticInst);
376 } else if (!curMacroStaticInst) {
377 //We're not in the middle of a macro instruction
374 StaticInstPtr instPtr = NULL;
375
376 //Predecode, ie bundle up an ExtMachInst
377 //This should go away once the constructor can be set up properly
378 predecoder.setTC(thread->getTC());
379 //If more fetch data is needed, pass it in.
380 Addr fetchPC = (thread->readPC() & PCMask) + fetchOffset;
381 //if(predecoder.needMoreBytes())

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396 stayAtPC = true;
397 fetchOffset += sizeof(MachInst);
398 }
399
400 //If we decoded an instruction and it's microcoded, start pulling
401 //out micro ops
402 if (instPtr && instPtr->isMacroop()) {
403 curMacroStaticInst = instPtr;
378 StaticInstPtr instPtr = NULL;
379
380 //Predecode, ie bundle up an ExtMachInst
381 //This should go away once the constructor can be set up properly
382 predecoder.setTC(thread->getTC());
383 //If more fetch data is needed, pass it in.
384 Addr fetchPC = (thread->readPC() & PCMask) + fetchOffset;
385 //if(predecoder.needMoreBytes())

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400 stayAtPC = true;
401 fetchOffset += sizeof(MachInst);
402 }
403
404 //If we decoded an instruction and it's microcoded, start pulling
405 //out micro ops
406 if (instPtr && instPtr->isMacroop()) {
407 curMacroStaticInst = instPtr;
404 curStaticInst = curMacroStaticInst->
405 fetchMicroop(thread->readMicroPC());
408 curStaticInst = curMacroStaticInst->fetchMicroop(upc);
406 } else {
407 curStaticInst = instPtr;
408 }
409 } else {
410 //Read the next micro op from the macro op
409 } else {
410 curStaticInst = instPtr;
411 }
412 } else {
413 //Read the next micro op from the macro op
411 curStaticInst = curMacroStaticInst->
412 fetchMicroop(thread->readMicroPC());
414 curStaticInst = curMacroStaticInst->fetchMicroop(upc);
413 }
414
415 //If we decoded an instruction this "tick", record information about it.
416 if(curStaticInst)
417 {
418#if TRACING_ON
419 traceData = tracer->getInstRecord(curTick, tc, curStaticInst,
420 thread->readPC());

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464void
465BaseSimpleCPU::advancePC(Fault fault)
466{
467 //Since we're moving to a new pc, zero out the offset
468 fetchOffset = 0;
469 if (fault != NoFault) {
470 curMacroStaticInst = StaticInst::nullStaticInstPtr;
471 predecoder.reset();
415 }
416
417 //If we decoded an instruction this "tick", record information about it.
418 if(curStaticInst)
419 {
420#if TRACING_ON
421 traceData = tracer->getInstRecord(curTick, tc, curStaticInst,
422 thread->readPC());

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466void
467BaseSimpleCPU::advancePC(Fault fault)
468{
469 //Since we're moving to a new pc, zero out the offset
470 fetchOffset = 0;
471 if (fault != NoFault) {
472 curMacroStaticInst = StaticInst::nullStaticInstPtr;
473 predecoder.reset();
472 thread->setMicroPC(0);
473 thread->setNextMicroPC(1);
474 thread->setMicroPC(normalMicroPC(0));
475 thread->setNextMicroPC(normalMicroPC(1));
474 fault->invoke(tc);
475 } else {
476 //If we're at the last micro op for this instruction
477 if (curStaticInst && curStaticInst->isLastMicroop()) {
476 fault->invoke(tc);
477 } else {
478 //If we're at the last micro op for this instruction
479 if (curStaticInst && curStaticInst->isLastMicroop()) {
478 //We should be working with a macro op
479 assert(curMacroStaticInst);
480 //We should be working with a macro op or be in the ROM
481 assert(curMacroStaticInst ||
482 isRomMicroPC(thread->readMicroPC()));
480 //Close out this macro op, and clean up the
481 //microcode state
482 curMacroStaticInst = StaticInst::nullStaticInstPtr;
483 //Close out this macro op, and clean up the
484 //microcode state
485 curMacroStaticInst = StaticInst::nullStaticInstPtr;
483 thread->setMicroPC(0);
484 thread->setNextMicroPC(1);
486 thread->setMicroPC(normalMicroPC(0));
487 thread->setNextMicroPC(normalMicroPC(1));
485 }
486 //If we're still in a macro op
488 }
489 //If we're still in a macro op
487 if (curMacroStaticInst) {
490 if (curMacroStaticInst || isRomMicroPC(thread->readMicroPC())) {
488 //Advance the micro pc
489 thread->setMicroPC(thread->readNextMicroPC());
490 //Advance the "next" micro pc. Note that there are no delay
491 //slots, and micro ops are "word" addressed.
492 thread->setNextMicroPC(thread->readNextMicroPC() + 1);
493 } else {
494 // go to the next instruction
495 thread->setPC(thread->readNextPC());

--- 41 unchanged lines hidden --- 		491 //Advance the micro pc
492 thread->setMicroPC(thread->readNextMicroPC());
493 //Advance the "next" micro pc. Note that there are no delay
494 //slots, and micro ops are "word" addressed.
495 thread->setNextMicroPC(thread->readNextMicroPC() + 1);
496 } else {
497 // go to the next instruction
498 thread->setPC(thread->readNextPC());

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