base.cc (5222:bb733a878f85) base.cc (5237:6c819dbe8045)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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461void
462BaseSimpleCPU::advancePC(Fault fault)
463{
464 //Since we're moving to a new pc, zero out the offset
465 fetchOffset = 0;
466 if (fault != NoFault) {
467 curMacroStaticInst = StaticInst::nullStaticInstPtr;
468 predecoder.reset();
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 452 unchanged lines hidden (view full) ---

461void
462BaseSimpleCPU::advancePC(Fault fault)
463{
464 //Since we're moving to a new pc, zero out the offset
465 fetchOffset = 0;
466 if (fault != NoFault) {
467 curMacroStaticInst = StaticInst::nullStaticInstPtr;
468 predecoder.reset();
469 fault->invoke(tc);
470 thread->setMicroPC(0);
471 thread->setNextMicroPC(1);
469 thread->setMicroPC(0);
470 thread->setNextMicroPC(1);
471 fault->invoke(tc);
472 } else {
473 //If we're at the last micro op for this instruction
474 if (curStaticInst && curStaticInst->isLastMicroop()) {
475 //We should be working with a macro op
476 assert(curMacroStaticInst);
477 //Close out this macro op, and clean up the
478 //microcode state
479 curMacroStaticInst = StaticInst::nullStaticInstPtr;

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498
499 Addr oldpc;
500 do {
501 oldpc = thread->readPC();
502 system->pcEventQueue.service(tc);
503 } while (oldpc != thread->readPC());
504}
505
472 } else {
473 //If we're at the last micro op for this instruction
474 if (curStaticInst && curStaticInst->isLastMicroop()) {
475 //We should be working with a macro op
476 assert(curMacroStaticInst);
477 //Close out this macro op, and clean up the
478 //microcode state
479 curMacroStaticInst = StaticInst::nullStaticInstPtr;

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498
499 Addr oldpc;
500 do {
501 oldpc = thread->readPC();
502 system->pcEventQueue.service(tc);
503 } while (oldpc != thread->readPC());
504}
505
506Fault
507BaseSimpleCPU::CacheOp(uint8_t Op, Addr EffAddr)
508{
509 // translate to physical address
510 Fault fault = NoFault;
511 int CacheID = Op & 0x3; // Lower 3 bits identify Cache
512 int CacheOP = Op >> 2; // Upper 3 bits identify Cache Operation
513 if(CacheID > 1)
514 {
515 warn("CacheOps not implemented for secondary/tertiary caches\n");
516 }
517 else
518 {
519 switch(CacheOP)
520 { // Fill Packet Type
521 case 0: warn("Invalidate Cache Op\n");
522 break;
523 case 1: warn("Index Load Tag Cache Op\n");
524 break;
525 case 2: warn("Index Store Tag Cache Op\n");
526 break;
527 case 4: warn("Hit Invalidate Cache Op\n");
528 break;
529 case 5: warn("Fill/Hit Writeback Invalidate Cache Op\n");
530 break;
531 case 6: warn("Hit Writeback\n");
532 break;
533 case 7: warn("Fetch & Lock Cache Op\n");
534 break;
535 default: warn("Unimplemented Cache Op\n");
536 }
537 }
538 return fault;
539}