base.cc (4465:70123ac99284) base.cc (4495:dbd2943590e6)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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65#else // !FULL_SYSTEM
66#include "mem/mem_object.hh"
67#endif // FULL_SYSTEM
68
69using namespace std;
70using namespace TheISA;
71
72BaseSimpleCPU::BaseSimpleCPU(Params *p)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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65#else // !FULL_SYSTEM
66#include "mem/mem_object.hh"
67#endif // FULL_SYSTEM
68
69using namespace std;
70using namespace TheISA;
71
72BaseSimpleCPU::BaseSimpleCPU(Params *p)
73 : BaseCPU(p), thread(NULL), predecoder(NULL)
73 : BaseCPU(p), traceData(NULL), thread(NULL), predecoder(NULL)
74{
75#if FULL_SYSTEM
76 thread = new SimpleThread(this, 0, p->system, p->itb, p->dtb);
77#else
78 thread = new SimpleThread(this, /* thread_num */ 0, p->process,
79 /* asid */ 0);
80#endif // !FULL_SYSTEM
81

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86 numInst = 0;
87 startNumInst = 0;
88 numLoad = 0;
89 startNumLoad = 0;
90 lastIcacheStall = 0;
91 lastDcacheStall = 0;
92
93 threadContexts.push_back(tc);
74{
75#if FULL_SYSTEM
76 thread = new SimpleThread(this, 0, p->system, p->itb, p->dtb);
77#else
78 thread = new SimpleThread(this, /* thread_num */ 0, p->process,
79 /* asid */ 0);
80#endif // !FULL_SYSTEM
81

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86 numInst = 0;
87 startNumInst = 0;
88 numLoad = 0;
89 startNumLoad = 0;
90 lastIcacheStall = 0;
91 lastDcacheStall = 0;
92
93 threadContexts.push_back(tc);
94
95 fetchOffset = 0;
96 stayAtPC = false;
97}
98
99BaseSimpleCPU::~BaseSimpleCPU()
100{
101}
102
103void
104BaseSimpleCPU::deallocateContext(int thread_num)

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324 }
325#endif
326}
327
328
329Fault
330BaseSimpleCPU::setupFetchRequest(Request *req)
331{
94}
95
96BaseSimpleCPU::~BaseSimpleCPU()
97{
98}
99
100void
101BaseSimpleCPU::deallocateContext(int thread_num)

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321 }
322#endif
323}
324
325
326Fault
327BaseSimpleCPU::setupFetchRequest(Request *req)
328{
329 uint64_t threadPC = thread->readPC();
330
332 // set up memory request for instruction fetch
333#if ISA_HAS_DELAY_SLOT
331 // set up memory request for instruction fetch
332#if ISA_HAS_DELAY_SLOT
334 DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p NNPC:%08p\n",thread->readPC(),
333 DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p NNPC:%08p\n",threadPC,
335 thread->readNextPC(),thread->readNextNPC());
336#else
334 thread->readNextPC(),thread->readNextNPC());
335#else
337 DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p",thread->readPC(),
336 DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p",threadPC,
338 thread->readNextPC());
339#endif
340
337 thread->readNextPC());
338#endif
339
341 const Addr PCMask = ~(sizeof(MachInst) - 1);
342 Addr fetchPC = thread->readPC() + fetchOffset;
343 req->setVirt(0, fetchPC & PCMask, sizeof(MachInst), 0, thread->readPC());
340 req->setVirt(0, threadPC & ~3, sizeof(MachInst),
341 (FULL_SYSTEM && (threadPC & 1)) ? PHYSICAL : 0,
342 threadPC);
344
345 Fault fault = thread->translateInstReq(req);
346
347 return fault;
348}
349
350
351void

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363
364 thread->funcExeInst++;
365
366 // check for instruction-count-based events
367 comInstEventQueue[0]->serviceEvents(numInst);
368
369 // decode the instruction
370 inst = gtoh(inst);
343
344 Fault fault = thread->translateInstReq(req);
345
346 return fault;
347}
348
349
350void

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362
363 thread->funcExeInst++;
364
365 // check for instruction-count-based events
366 comInstEventQueue[0]->serviceEvents(numInst);
367
368 // decode the instruction
369 inst = gtoh(inst);
371
372 //If we're not in the middle of a macro instruction
373 if (!curMacroStaticInst) {
370 //If we're not in the middle of a macro instruction
371 if (!curMacroStaticInst) {
374
375 StaticInstPtr instPtr = NULL;
376
377 //Predecode, ie bundle up an ExtMachInst
378 //This should go away once the constructor can be set up properly
379 predecoder.setTC(thread->getTC());
380 //If more fetch data is needed, pass it in.
372 StaticInstPtr instPtr = NULL;
373
374 //Predecode, ie bundle up an ExtMachInst
375 //This should go away once the constructor can be set up properly
376 predecoder.setTC(thread->getTC());
377 //If more fetch data is needed, pass it in.
381 const Addr PCMask = ~(sizeof(MachInst) - 1);
382 if(predecoder.needMoreBytes())
378 if(predecoder.needMoreBytes())
383 predecoder.moreBytes((thread->readPC() & PCMask) + fetchOffset,
384 0, inst);
379 predecoder.moreBytes(thread->readPC(), 0, inst);
385 else
386 predecoder.process();
380 else
381 predecoder.process();
387
388 //If an instruction is ready, decode it. Otherwise, we'll have to
389 //fetch beyond the MachInst at the current pc.
390 if (predecoder.extMachInstReady()) {
391#if THE_ISA == X86_ISA
392 thread->setNextPC(thread->readPC() + predecoder.getInstSize());
393#endif // X86_ISA
394 stayAtPC = false;
382 //If an instruction is ready, decode it
383 if (predecoder.extMachInstReady())
395 instPtr = StaticInst::decode(predecoder.getExtMachInst());
384 instPtr = StaticInst::decode(predecoder.getExtMachInst());
396 } else {
397 stayAtPC = true;
398 fetchOffset += sizeof(MachInst);
399 }
400
401 //If we decoded an instruction and it's microcoded, start pulling
402 //out micro ops
403 if (instPtr && instPtr->isMacroOp()) {
404 curMacroStaticInst = instPtr;
405 curStaticInst = curMacroStaticInst->
406 fetchMicroOp(thread->readMicroPC());
407 } else {
408 curStaticInst = instPtr;
409 }
410 } else {
411 //Read the next micro op from the macro op
412 curStaticInst = curMacroStaticInst->
413 fetchMicroOp(thread->readMicroPC());
414 }
415
385
386 //If we decoded an instruction and it's microcoded, start pulling
387 //out micro ops
388 if (instPtr && instPtr->isMacroOp()) {
389 curMacroStaticInst = instPtr;
390 curStaticInst = curMacroStaticInst->
391 fetchMicroOp(thread->readMicroPC());
392 } else {
393 curStaticInst = instPtr;
394 }
395 } else {
396 //Read the next micro op from the macro op
397 curStaticInst = curMacroStaticInst->
398 fetchMicroOp(thread->readMicroPC());
399 }
400
401#if TRACING_ON
416 //If we decoded an instruction this "tick", record information about it.
417 if(curStaticInst)
418 {
419 traceData = Trace::getInstRecord(curTick, tc, curStaticInst,
420 thread->readPC());
421
422 DPRINTF(Decode,"Decode: Decoded %s instruction: 0x%x\n",
423 curStaticInst->getName(), curStaticInst->machInst);
424
425#if FULL_SYSTEM
426 thread->setInst(inst);
427#endif // FULL_SYSTEM
428 }
402 //If we decoded an instruction this "tick", record information about it.
403 if(curStaticInst)
404 {
405 traceData = Trace::getInstRecord(curTick, tc, curStaticInst,
406 thread->readPC());
407
408 DPRINTF(Decode,"Decode: Decoded %s instruction: 0x%x\n",
409 curStaticInst->getName(), curStaticInst->machInst);
410
411#if FULL_SYSTEM
412 thread->setInst(inst);
413#endif // FULL_SYSTEM
414 }
415#endif // TRACING_ON
429}
430
431void
432BaseSimpleCPU::postExecute()
433{
434#if FULL_SYSTEM
435 if (thread->profile) {
436 bool usermode = TheISA::inUserMode(tc);

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459 traceData = NULL;
460 }
461}
462
463
464void
465BaseSimpleCPU::advancePC(Fault fault)
466{
416}
417
418void
419BaseSimpleCPU::postExecute()
420{
421#if FULL_SYSTEM
422 if (thread->profile) {
423 bool usermode = TheISA::inUserMode(tc);

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446 traceData = NULL;
447 }
448}
449
450
451void
452BaseSimpleCPU::advancePC(Fault fault)
453{
467 //Since we're moving to a new pc, zero out the offset
468 fetchOffset = 0;
469 if (fault != NoFault) {
470 curMacroStaticInst = StaticInst::nullStaticInstPtr;
471 fault->invoke(tc);
472 thread->setMicroPC(0);
473 thread->setNextMicroPC(1);
454 if (fault != NoFault) {
455 curMacroStaticInst = StaticInst::nullStaticInstPtr;
456 fault->invoke(tc);
457 thread->setMicroPC(0);
458 thread->setNextMicroPC(1);
474 } else {
459 } else if (predecoder.needMoreBytes()) {
475 //If we're at the last micro op for this instruction
476 if (curStaticInst && curStaticInst->isLastMicroOp()) {
477 //We should be working with a macro op
478 assert(curMacroStaticInst);
479 //Close out this macro op, and clean up the
480 //microcode state
481 curMacroStaticInst = StaticInst::nullStaticInstPtr;
482 thread->setMicroPC(0);

--- 27 unchanged lines hidden --- 		460 //If we're at the last micro op for this instruction
461 if (curStaticInst && curStaticInst->isLastMicroOp()) {
462 //We should be working with a macro op
463 assert(curMacroStaticInst);
464 //Close out this macro op, and clean up the
465 //microcode state
466 curMacroStaticInst = StaticInst::nullStaticInstPtr;
467 thread->setMicroPC(0);

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