base.cc (2672:268abc78c6af) | base.cc (2680:246e7104f744) |
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1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 25 unchanged lines hidden (view full) --- 34#include "base/loader/symtab.hh" 35#include "base/misc.hh" 36#include "base/pollevent.hh" 37#include "base/range.hh" 38#include "base/stats/events.hh" 39#include "base/trace.hh" 40#include "cpu/base.hh" 41#include "cpu/cpu_exec_context.hh" | 1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 25 unchanged lines hidden (view full) --- 34#include "base/loader/symtab.hh" 35#include "base/misc.hh" 36#include "base/pollevent.hh" 37#include "base/range.hh" 38#include "base/stats/events.hh" 39#include "base/trace.hh" 40#include "cpu/base.hh" 41#include "cpu/cpu_exec_context.hh" |
42#include "cpu/exec_context.hh" | 42#include "cpu/thread_context.hh" |
43#include "cpu/exetrace.hh" 44#include "cpu/profile.hh" 45#include "cpu/sampler/sampler.hh" 46#include "cpu/simple/base.hh" 47#include "cpu/smt.hh" 48#include "cpu/static_inst.hh" 49#include "kern/kernel_stats.hh" 50#include "mem/packet_impl.hh" --- 23 unchanged lines hidden (view full) --- 74{ 75#if FULL_SYSTEM 76 cpuXC = new CPUExecContext(this, 0, p->system, p->itb, p->dtb); 77#else 78 cpuXC = new CPUExecContext(this, /* thread_num */ 0, p->process, 79 /* asid */ 0, mem); 80#endif // !FULL_SYSTEM 81 | 43#include "cpu/exetrace.hh" 44#include "cpu/profile.hh" 45#include "cpu/sampler/sampler.hh" 46#include "cpu/simple/base.hh" 47#include "cpu/smt.hh" 48#include "cpu/static_inst.hh" 49#include "kern/kernel_stats.hh" 50#include "mem/packet_impl.hh" --- 23 unchanged lines hidden (view full) --- 74{ 75#if FULL_SYSTEM 76 cpuXC = new CPUExecContext(this, 0, p->system, p->itb, p->dtb); 77#else 78 cpuXC = new CPUExecContext(this, /* thread_num */ 0, p->process, 79 /* asid */ 0, mem); 80#endif // !FULL_SYSTEM 81 |
82 cpuXC->setStatus(ExecContext::Suspended); | 82 cpuXC->setStatus(ThreadContext::Suspended); |
83 | 83 |
84 xcProxy = cpuXC->getProxy(); | 84 tc = cpuXC->getTC(); |
85 86 numInst = 0; 87 startNumInst = 0; 88 numLoad = 0; 89 startNumLoad = 0; 90 lastIcacheStall = 0; 91 lastDcacheStall = 0; 92 | 85 86 numInst = 0; 87 startNumInst = 0; 88 numLoad = 0; 89 startNumLoad = 0; 90 lastIcacheStall = 0; 91 lastDcacheStall = 0; 92 |
93 execContexts.push_back(xcProxy); | 93 threadContexts.push_back(tc); |
94} 95 96BaseSimpleCPU::~BaseSimpleCPU() 97{ 98} 99 100void 101BaseSimpleCPU::deallocateContext(int thread_num) --- 183 unchanged lines hidden (view full) --- 285 return NoFault; 286#endif 287} 288 289#if FULL_SYSTEM 290Addr 291BaseSimpleCPU::dbg_vtophys(Addr addr) 292{ | 94} 95 96BaseSimpleCPU::~BaseSimpleCPU() 97{ 98} 99 100void 101BaseSimpleCPU::deallocateContext(int thread_num) --- 183 unchanged lines hidden (view full) --- 285 return NoFault; 286#endif 287} 288 289#if FULL_SYSTEM 290Addr 291BaseSimpleCPU::dbg_vtophys(Addr addr) 292{ |
293 return vtophys(xcProxy, addr); | 293 return vtophys(tc, addr); |
294} 295#endif // FULL_SYSTEM 296 297#if FULL_SYSTEM 298void 299BaseSimpleCPU::post_interrupt(int int_num, int index) 300{ 301 BaseCPU::post_interrupt(int_num, index); 302 | 294} 295#endif // FULL_SYSTEM 296 297#if FULL_SYSTEM 298void 299BaseSimpleCPU::post_interrupt(int int_num, int index) 300{ 301 BaseCPU::post_interrupt(int_num, index); 302 |
303 if (cpuXC->status() == ExecContext::Suspended) { | 303 if (cpuXC->status() == ThreadContext::Suspended) { |
304 DPRINTF(IPI,"Suspended Processor awoke\n"); 305 cpuXC->activate(); 306 } 307} 308#endif // FULL_SYSTEM 309 310void 311BaseSimpleCPU::checkForInterrupts() --- 27 unchanged lines hidden (view full) --- 339 340 if (cpuXC->readMiscReg(IPR_ASTRR)) 341 panic("asynchronous traps not implemented\n"); 342 343 if (ipl && ipl > cpuXC->readMiscReg(IPR_IPLR)) { 344 cpuXC->setMiscReg(IPR_ISR, summary); 345 cpuXC->setMiscReg(IPR_INTID, ipl); 346 | 304 DPRINTF(IPI,"Suspended Processor awoke\n"); 305 cpuXC->activate(); 306 } 307} 308#endif // FULL_SYSTEM 309 310void 311BaseSimpleCPU::checkForInterrupts() --- 27 unchanged lines hidden (view full) --- 339 340 if (cpuXC->readMiscReg(IPR_ASTRR)) 341 panic("asynchronous traps not implemented\n"); 342 343 if (ipl && ipl > cpuXC->readMiscReg(IPR_IPLR)) { 344 cpuXC->setMiscReg(IPR_ISR, summary); 345 cpuXC->setMiscReg(IPR_INTID, ipl); 346 |
347 Fault(new InterruptFault)->invoke(xcProxy); | 347 Fault(new InterruptFault)->invoke(tc); |
348 349 DPRINTF(Flow, "Interrupt! IPLR=%d ipl=%d summary=%x\n", 350 cpuXC->readMiscReg(IPR_IPLR), ipl, summary); 351 } 352 } 353#endif 354} 355 --- 32 unchanged lines hidden (view full) --- 388 389 // check for instruction-count-based events 390 comInstEventQueue[0]->serviceEvents(numInst); 391 392 // decode the instruction 393 inst = gtoh(inst); 394 curStaticInst = StaticInst::decode(makeExtMI(inst, cpuXC->readPC())); 395 | 348 349 DPRINTF(Flow, "Interrupt! IPLR=%d ipl=%d summary=%x\n", 350 cpuXC->readMiscReg(IPR_IPLR), ipl, summary); 351 } 352 } 353#endif 354} 355 --- 32 unchanged lines hidden (view full) --- 388 389 // check for instruction-count-based events 390 comInstEventQueue[0]->serviceEvents(numInst); 391 392 // decode the instruction 393 inst = gtoh(inst); 394 curStaticInst = StaticInst::decode(makeExtMI(inst, cpuXC->readPC())); 395 |
396 traceData = Trace::getInstRecord(curTick, xcProxy, this, curStaticInst, | 396 traceData = Trace::getInstRecord(curTick, tc, this, curStaticInst, |
397 cpuXC->readPC()); 398 399 DPRINTF(Decode,"Decode: Decoded %s instruction (opcode: 0x%x): 0x%x\n", 400 curStaticInst->getName(), curStaticInst->getOpcode(), 401 curStaticInst->machInst); 402 403#if FULL_SYSTEM 404 cpuXC->setInst(inst); 405#endif // FULL_SYSTEM 406} 407 408void 409BaseSimpleCPU::postExecute() 410{ 411#if FULL_SYSTEM 412 if (system->kernelBinning->fnbin) { 413 assert(cpuXC->getKernelStats()); | 397 cpuXC->readPC()); 398 399 DPRINTF(Decode,"Decode: Decoded %s instruction (opcode: 0x%x): 0x%x\n", 400 curStaticInst->getName(), curStaticInst->getOpcode(), 401 curStaticInst->machInst); 402 403#if FULL_SYSTEM 404 cpuXC->setInst(inst); 405#endif // FULL_SYSTEM 406} 407 408void 409BaseSimpleCPU::postExecute() 410{ 411#if FULL_SYSTEM 412 if (system->kernelBinning->fnbin) { 413 assert(cpuXC->getKernelStats()); |
414 system->kernelBinning->execute(xcProxy, inst); | 414 system->kernelBinning->execute(tc, inst); |
415 } 416 417 if (cpuXC->profile) { 418 bool usermode = 419 (cpuXC->readMiscReg(AlphaISA::IPR_DTB_CM) & 0x18) != 0; 420 cpuXC->profilePC = usermode ? 1 : cpuXC->readPC(); | 415 } 416 417 if (cpuXC->profile) { 418 bool usermode = 419 (cpuXC->readMiscReg(AlphaISA::IPR_DTB_CM) & 0x18) != 0; 420 cpuXC->profilePC = usermode ? 1 : cpuXC->readPC(); |
421 ProfileNode *node = cpuXC->profile->consume(xcProxy, inst); | 421 ProfileNode *node = cpuXC->profile->consume(tc, inst); |
422 if (node) 423 cpuXC->profileNode = node; 424 } 425#endif 426 427 if (curStaticInst->isMemRef()) { 428 numMemRefs++; 429 } --- 11 unchanged lines hidden (view full) --- 441} 442 443 444void 445BaseSimpleCPU::advancePC(Fault fault) 446{ 447 if (fault != NoFault) { 448#if FULL_SYSTEM | 422 if (node) 423 cpuXC->profileNode = node; 424 } 425#endif 426 427 if (curStaticInst->isMemRef()) { 428 numMemRefs++; 429 } --- 11 unchanged lines hidden (view full) --- 441} 442 443 444void 445BaseSimpleCPU::advancePC(Fault fault) 446{ 447 if (fault != NoFault) { 448#if FULL_SYSTEM |
449 fault->invoke(xcProxy); | 449 fault->invoke(tc); |
450#else // !FULL_SYSTEM 451 fatal("fault (%s) detected @ PC %08p", fault->name(), cpuXC->readPC()); 452#endif // FULL_SYSTEM 453 } 454 else { 455 // go to the next instruction 456 cpuXC->setPC(cpuXC->readNextPC()); 457#if THE_ISA == ALPHA_ISA --- 4 unchanged lines hidden (view full) --- 462#endif 463 464 } 465 466#if FULL_SYSTEM 467 Addr oldpc; 468 do { 469 oldpc = cpuXC->readPC(); | 450#else // !FULL_SYSTEM 451 fatal("fault (%s) detected @ PC %08p", fault->name(), cpuXC->readPC()); 452#endif // FULL_SYSTEM 453 } 454 else { 455 // go to the next instruction 456 cpuXC->setPC(cpuXC->readNextPC()); 457#if THE_ISA == ALPHA_ISA --- 4 unchanged lines hidden (view full) --- 462#endif 463 464 } 465 466#if FULL_SYSTEM 467 Addr oldpc; 468 do { 469 oldpc = cpuXC->readPC(); |
470 system->pcEventQueue.service(xcProxy); | 470 system->pcEventQueue.service(tc); |
471 } while (oldpc != cpuXC->readPC()); 472#endif 473} 474 | 471 } while (oldpc != cpuXC->readPC()); 472#endif 473} 474 |