base.cc (2662:f24ae2d09e27) base.cc (2663:c82193ae8467)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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352
353Fault
354BaseSimpleCPU::setupFetchRequest(Request *req)
355{
356 // set up memory request for instruction fetch
357 DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p NNPC:%08p\n",cpuXC->readPC(),
358 cpuXC->readNextPC(),cpuXC->readNextNPC());
359
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 343 unchanged lines hidden (view full) ---

352
353Fault
354BaseSimpleCPU::setupFetchRequest(Request *req)
355{
356 // set up memory request for instruction fetch
357 DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p NNPC:%08p\n",cpuXC->readPC(),
358 cpuXC->readNextPC(),cpuXC->readNextNPC());
359
360 req->setVaddr(cpuXC->readPC() & ~3);
361 req->setTime(curTick);
362#if FULL_SYSTEM
363 req->setFlags((cpuXC->readPC() & 1) ? PHYSICAL : 0);
364#else
365 req->setFlags(0);
366#endif
360 req->setVirt(0, cpuXC->readPC() & ~3, sizeof(MachInst),
361 (FULL_SYSTEM && (cpuXC->readPC() & 1)) ? PHYSICAL : 0,
362 cpuXC->readPC());
367
368 Fault fault = cpuXC->translateInstReq(req);
369
370 return fault;
371}
372
373
374void

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364 Fault fault = cpuXC->translateInstReq(req);
365
366 return fault;
367}
368
369
370void

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