base.cc (2644:8a45565c2c04) base.cc (2662:f24ae2d09e27)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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346 cpuXC->readMiscReg(IPR_IPLR), ipl, summary);
347 }
348 }
349#endif
350}
351
352
353Fault
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 337 unchanged lines hidden (view full) ---

346 cpuXC->readMiscReg(IPR_IPLR), ipl, summary);
347 }
348 }
349#endif
350}
351
352
353Fault
354BaseSimpleCPU::setupFetchPacket(Packet *ifetch_pkt)
354BaseSimpleCPU::setupFetchRequest(Request *req)
355{
355{
356 // Try to fetch an instruction
357
358 // set up memory request for instruction fetch
356 // set up memory request for instruction fetch
359
360 DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p NNPC:%08p\n",cpuXC->readPC(),
361 cpuXC->readNextPC(),cpuXC->readNextNPC());
362
357 DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p NNPC:%08p\n",cpuXC->readPC(),
358 cpuXC->readNextPC(),cpuXC->readNextNPC());
359
363 Request *ifetch_req = ifetch_pkt->req;
364 ifetch_req->setVaddr(cpuXC->readPC() & ~3);
365 ifetch_req->setTime(curTick);
360 req->setVaddr(cpuXC->readPC() & ~3);
361 req->setTime(curTick);
366#if FULL_SYSTEM
362#if FULL_SYSTEM
367 ifetch_req->setFlags((cpuXC->readPC() & 1) ? PHYSICAL : 0);
363 req->setFlags((cpuXC->readPC() & 1) ? PHYSICAL : 0);
368#else
364#else
369 ifetch_req->setFlags(0);
365 req->setFlags(0);
370#endif
371
366#endif
367
372 Fault fault = cpuXC->translateInstReq(ifetch_req);
368 Fault fault = cpuXC->translateInstReq(req);
373
369
374 if (fault == NoFault) {
375 ifetch_pkt->reinitFromRequest();
376 }
377
378 return fault;
379}
380
381
382void
383BaseSimpleCPU::preExecute()
384{
385 // maintain $r0 semantics

--- 97 unchanged lines hidden --- 		370 return fault;
371}
372
373
374void
375BaseSimpleCPU::preExecute()
376{
377 // maintain $r0 semantics

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