base.cc (12748:ae5ce8e42de7) base.cc (12749:223c83ed9979)
1/*
2 * Copyright (c) 2010-2012, 2015, 2017 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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463 interrupt->invoke(tc);
464 thread->decoder.reset();
465 }
466 }
467}
468
469
470void
1/*
2 * Copyright (c) 2010-2012, 2015, 2017 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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463 interrupt->invoke(tc);
464 thread->decoder.reset();
465 }
466 }
467}
468
469
470void
471BaseSimpleCPU::setupFetchRequest(RequestPtr req)
471BaseSimpleCPU::setupFetchRequest(const RequestPtr &req)
472{
473 SimpleExecContext &t_info = *threadInfo[curThread];
474 SimpleThread* thread = t_info.thread;
475
476 Addr instAddr = thread->instAddr();
477 Addr fetchPC = (instAddr & PCMask) + t_info.fetchOffset;
478
479 // set up memory request for instruction fetch

--- 234 unchanged lines hidden --- 		472{
473 SimpleExecContext &t_info = *threadInfo[curThread];
474 SimpleThread* thread = t_info.thread;
475
476 Addr instAddr = thread->instAddr();
477 Addr fetchPC = (instAddr & PCMask) + t_info.fetchOffset;
478
479 // set up memory request for instruction fetch

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