base.cc (10061:3b0d0c988ed6) base.cc (10193:d717abc806aa)
1/*
2 * Copyright (c) 2010-2012 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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281 ;
282
283 dcacheRetryCycles
284 .name(name() + ".dcache_retry_cycles")
285 .desc("DCache total retry cycles")
286 .prereq(dcacheRetryCycles)
287 ;
288
1/*
2 * Copyright (c) 2010-2012 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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281 ;
282
283 dcacheRetryCycles
284 .name(name() + ".dcache_retry_cycles")
285 .desc("DCache total retry cycles")
286 .prereq(dcacheRetryCycles)
287 ;
288
289 statExecutedInstType
290 .init(Enums::Num_OpClass)
291 .name(name() + ".op_class")
292 .desc("Class of executed instruction")
293 .flags(total | pdf | dist)
294 ;
295 for (unsigned i = 0; i < Num_OpClasses; ++i) {
296 statExecutedInstType.subname(i, Enums::OpClassStrings[i]);
297 }
298
289 idleFraction = constant(1.0) - notIdleFraction;
290 numIdleCycles = idleFraction * numCycles;
291 numBusyCycles = (notIdleFraction)*numCycles;
292
293 numBranches
294 .name(name() + ".Branches")
295 .desc("Number of branches fetched")
296 .prereq(numBranches);

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527 numLoadInsts++;
528 }
529
530 if (curStaticInst->isStore()){
531 numStoreInsts++;
532 }
533 /* End power model statistics */
534
299 idleFraction = constant(1.0) - notIdleFraction;
300 numIdleCycles = idleFraction * numCycles;
301 numBusyCycles = (notIdleFraction)*numCycles;
302
303 numBranches
304 .name(name() + ".Branches")
305 .desc("Number of branches fetched")
306 .prereq(numBranches);

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537 numLoadInsts++;
538 }
539
540 if (curStaticInst->isStore()){
541 numStoreInsts++;
542 }
543 /* End power model statistics */
544
545 statExecutedInstType[curStaticInst->opClass()]++;
546
535 if (FullSystem)
536 traceFunctions(instAddr);
537
538 if (traceData) {
539 traceData->dump();
540 delete traceData;
541 traceData = NULL;
542 }

--- 47 unchanged lines hidden --- 		547 if (FullSystem)
548 traceFunctions(instAddr);
549
550 if (traceData) {
551 traceData->dump();
552 delete traceData;
553 traceData = NULL;
554 }

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