1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 322 unchanged lines hidden (view full) --- 331{ 332 Addr threadPC = thread->readPC(); 333 334 // set up memory request for instruction fetch 335#if ISA_HAS_DELAY_SLOT 336 DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p NNPC:%08p\n",threadPC, 337 thread->readNextPC(),thread->readNextNPC()); 338#else |
339 DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p\n",threadPC, |
340 thread->readNextPC()); 341#endif 342 |
343 Addr fetchPC = (threadPC & PCMask) + fetchOffset; 344 req->setVirt(0, fetchPC, sizeof(MachInst), 0, threadPC); |
345 346 Fault fault = thread->translateInstReq(req); 347 348 return fault; 349} 350 351 352void --- 22 unchanged lines hidden (view full) --- 375 376 StaticInstPtr instPtr = NULL; 377 378 //Predecode, ie bundle up an ExtMachInst 379 //This should go away once the constructor can be set up properly 380 predecoder.setTC(thread->getTC()); 381 //If more fetch data is needed, pass it in. 382 if(predecoder.needMoreBytes()) |
383 predecoder.moreBytes(thread->readPC(), 384 (thread->readPC() & PCMask) + fetchOffset, 0, inst); |
385 else 386 predecoder.process(); 387 388 //If an instruction is ready, decode it. Otherwise, we'll have to 389 //fetch beyond the MachInst at the current pc. 390 if (predecoder.extMachInstReady()) { 391#if THE_ISA == X86_ISA 392 thread->setNextPC(thread->readPC() + predecoder.getInstSize()); --- 119 unchanged lines hidden --- |