1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 65 unchanged lines hidden (view full) --- 74{ 75#if FULL_SYSTEM 76 thread = new SimpleThread(this, 0, p->system, p->itb, p->dtb); 77#else 78 thread = new SimpleThread(this, /* thread_num */ 0, p->process, 79 /* asid */ 0); 80#endif // !FULL_SYSTEM 81 |
82 thread->setStatus(ThreadContext::Unallocated); |
83 84 tc = thread->getTC(); 85 86 numInst = 0; 87 startNumInst = 0; 88 numLoad = 0; 89 startNumLoad = 0; 90 lastIcacheStall = 0; 91 lastDcacheStall = 0; 92 93 threadContexts.push_back(tc); |
94} 95 96BaseSimpleCPU::~BaseSimpleCPU() 97{ 98} 99 100void 101BaseSimpleCPU::deallocateContext(int thread_num) --- 228 unchanged lines hidden (view full) --- 330#if ISA_HAS_DELAY_SLOT 331 DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p NNPC:%08p\n",thread->readPC(), 332 thread->readNextPC(),thread->readNextNPC()); 333#else 334 DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p",thread->readPC(), 335 thread->readNextPC()); 336#endif 337 |
338 req->setVirt(0, thread->readPC() & ~3, sizeof(MachInst), 339 (FULL_SYSTEM && (thread->readPC() & 1)) ? PHYSICAL : 0, 340 thread->readPC()); |
341 342 Fault fault = thread->translateInstReq(req); 343 344 return fault; 345} 346 347 348void --- 11 unchanged lines hidden (view full) --- 360 361 thread->funcExeInst++; 362 363 // check for instruction-count-based events 364 comInstEventQueue[0]->serviceEvents(numInst); 365 366 // decode the instruction 367 inst = gtoh(inst); |
368 //If we're not in the middle of a macro instruction 369 if (!curMacroStaticInst) { |
370 StaticInstPtr instPtr = NULL; 371 372 //Predecode, ie bundle up an ExtMachInst 373 //This should go away once the constructor can be set up properly 374 predecoder.setTC(thread->getTC()); 375 //If more fetch data is needed, pass it in. |
376 if(predecoder.needMoreBytes()) |
377 predecoder.moreBytes(thread->readPC(), 0, inst); |
378 else 379 predecoder.process(); |
380 //If an instruction is ready, decode it 381 if (predecoder.extMachInstReady()) |
382 instPtr = StaticInst::decode(predecoder.getExtMachInst()); |
383 384 //If we decoded an instruction and it's microcoded, start pulling 385 //out micro ops 386 if (instPtr && instPtr->isMacroOp()) { 387 curMacroStaticInst = instPtr; 388 curStaticInst = curMacroStaticInst-> 389 fetchMicroOp(thread->readMicroPC()); 390 } else { --- 51 unchanged lines hidden (view full) --- 442 traceData = NULL; 443 } 444} 445 446 447void 448BaseSimpleCPU::advancePC(Fault fault) 449{ |
450 if (fault != NoFault) { 451 curMacroStaticInst = StaticInst::nullStaticInstPtr; 452 fault->invoke(tc); 453 thread->setMicroPC(0); 454 thread->setNextMicroPC(1); |
455 } else if (predecoder.needMoreBytes()) { |
456 //If we're at the last micro op for this instruction 457 if (curStaticInst && curStaticInst->isLastMicroOp()) { 458 //We should be working with a macro op 459 assert(curMacroStaticInst); 460 //Close out this macro op, and clean up the 461 //microcode state 462 curMacroStaticInst = StaticInst::nullStaticInstPtr; 463 thread->setMicroPC(0); --- 27 unchanged lines hidden --- |