1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 343 unchanged lines hidden (view full) --- 352 353Fault 354BaseSimpleCPU::setupFetchRequest(Request *req) 355{ 356 // set up memory request for instruction fetch 357 DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p NNPC:%08p\n",cpuXC->readPC(), 358 cpuXC->readNextPC(),cpuXC->readNextNPC()); 359 |
360 req->setVirt(0, cpuXC->readPC() & ~3, sizeof(MachInst), 361 (FULL_SYSTEM && (cpuXC->readPC() & 1)) ? PHYSICAL : 0, 362 cpuXC->readPC()); |
363 364 Fault fault = cpuXC->translateInstReq(req); 365 366 return fault; 367} 368 369 370void --- 100 unchanged lines hidden --- |