93a94,96
>
> fetchOffset = 0;
> stayAtPC = false;
338,340d340
< // This will generate a mask which aligns the pc on MachInst size
< // boundaries. It won't work for non-power-of-two sized MachInsts, but
< // it will work better than a hard coded mask.
342,343c342,343
< req->setVirt(0, thread->readPC() & PCMask, sizeof(MachInst), 0,
< thread->readPC());
---
> Addr fetchPC = thread->readPC() + fetchOffset;
> req->setVirt(0, fetchPC & PCMask, sizeof(MachInst), 0, thread->readPC());
370a371
>
372a374
>
378a381
> const Addr PCMask = ~(sizeof(MachInst) - 1);
380c383,384
< predecoder.moreBytes(thread->readPC(), 0, inst);
---
> predecoder.moreBytes((thread->readPC() & PCMask) + fetchOffset,
> 0, inst);
383,384c387,394
< //If an instruction is ready, decode it
< if (predecoder.extMachInstReady())
---
>
> //If an instruction is ready, decode it. Otherwise, we'll have to
> //fetch beyond the MachInst at the current pc.
> if (predecoder.extMachInstReady()) {
> #if THE_ISA == X86_ISA
> thread->setNextPC(thread->readPC() + predecoder.getInstSize());
> #endif // X86_ISA
> stayAtPC = false;
385a396,399
> } else {
> stayAtPC = true;
> fetchOffset += sizeof(MachInst);
> }
452a467,468
> //Since we're moving to a new pc, zero out the offset
> fetchOffset = 0;
458c474
< } else if (predecoder.needMoreBytes()) {
---
> } else {