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1/*
2 * Copyright (c) 2010-2011 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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278void
279BaseSimpleCPU::resetStats()
280{
281// startNumInst = numInst;
282 notIdleFraction = (_status != Idle);
283}
284
285void
286BaseSimpleCPU::serialize(ostream &os)
287{
288 SERIALIZE_ENUM(_status);
289 BaseCPU::serialize(os);
290// SERIALIZE_SCALAR(inst);
291 nameOut(os, csprintf("%s.xc.0", name()));
292 thread->serialize(os);
293}
294
295void
296BaseSimpleCPU::unserialize(Checkpoint *cp, const string &section)
297{
298 UNSERIALIZE_ENUM(_status);
299 BaseCPU::unserialize(cp, section);
300// UNSERIALIZE_SCALAR(inst);
301 thread->unserialize(cp, csprintf("%s.xc.0", section));
302}
303
304void
305change_thread_state(ThreadID tid, int activate, int priority)
306{
307}
308
309Addr

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