1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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86 numInst = 0;
87 startNumInst = 0;
88 numLoad = 0;
89 startNumLoad = 0;
90 lastIcacheStall = 0;
91 lastDcacheStall = 0;
92
93 threadContexts.push_back(tc);
94}
95
96BaseSimpleCPU::~BaseSimpleCPU()
97{
98}
99
100void
101BaseSimpleCPU::deallocateContext(int thread_num)

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330#if ISA_HAS_DELAY_SLOT
331 DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p NNPC:%08p\n",thread->readPC(),
332 thread->readNextPC(),thread->readNextNPC());
333#else
334 DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p",thread->readPC(),
335 thread->readNextPC());
336#endif
337
338 // This will generate a mask which aligns the pc on MachInst size
339 // boundaries. It won't work for non-power-of-two sized MachInsts, but
340 // it will work better than a hard coded mask.
341 const Addr PCMask = ~(sizeof(MachInst) - 1);
342 req->setVirt(0, thread->readPC() & PCMask, sizeof(MachInst), 0,
343 thread->readPC());
344
345 Fault fault = thread->translateInstReq(req);
346
347 return fault;
348}
349
350
351void

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363
364 thread->funcExeInst++;
365
366 // check for instruction-count-based events
367 comInstEventQueue[0]->serviceEvents(numInst);
368
369 // decode the instruction
370 inst = gtoh(inst);
371 //If we're not in the middle of a macro instruction
372 if (!curMacroStaticInst) {
373 StaticInstPtr instPtr = NULL;
374
375 //Predecode, ie bundle up an ExtMachInst
376 //This should go away once the constructor can be set up properly
377 predecoder.setTC(thread->getTC());
378 //If more fetch data is needed, pass it in.
379 if(predecoder.needMoreBytes())
380 predecoder.moreBytes(thread->readPC(), 0, inst);
381 else
382 predecoder.process();
383 //If an instruction is ready, decode it
384 if (predecoder.extMachInstReady())
385 instPtr = StaticInst::decode(predecoder.getExtMachInst());
386
387 //If we decoded an instruction and it's microcoded, start pulling
388 //out micro ops
389 if (instPtr && instPtr->isMacroOp()) {
390 curMacroStaticInst = instPtr;
391 curStaticInst = curMacroStaticInst->
392 fetchMicroOp(thread->readMicroPC());
393 } else {

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445 traceData = NULL;
446 }
447}
448
449
450void
451BaseSimpleCPU::advancePC(Fault fault)
452{
453 if (fault != NoFault) {
454 curMacroStaticInst = StaticInst::nullStaticInstPtr;
455 fault->invoke(tc);
456 thread->setMicroPC(0);
457 thread->setNextMicroPC(1);
458 } else if (predecoder.needMoreBytes()) {
459 //If we're at the last micro op for this instruction
460 if (curStaticInst && curStaticInst->isLastMicroOp()) {
461 //We should be working with a macro op
462 assert(curMacroStaticInst);
463 //Close out this macro op, and clean up the
464 //microcode state
465 curMacroStaticInst = StaticInst::nullStaticInstPtr;
466 thread->setMicroPC(0);

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