1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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391
392 thread->funcExeInst++;
393
394 // check for instruction-count-based events
395 comInstEventQueue[0]->serviceEvents(numInst);
396
397 // decode the instruction
398 inst = gtoh(inst);
399 curStaticInst = StaticInst::decode(makeExtMI(inst, thread->readPC()));
400
401 traceData = Trace::getInstRecord(curTick, tc, curStaticInst,
402 thread->readPC());
403
404 DPRINTF(Decode,"Decode: Decoded %s instruction (opcode: 0x%x): 0x%x\n",
405 curStaticInst->getName(), curStaticInst->getOpcode(),
406 curStaticInst->machInst);
407
408#if FULL_SYSTEM

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441}
442
443
444void
445BaseSimpleCPU::advancePC(Fault fault)
446{
447 if (fault != NoFault) {
448 fault->invoke(tc);
449 }
450 else {
451 // go to the next instruction
452 thread->setPC(thread->readNextPC());
453#if ISA_HAS_DELAY_SLOT
454 thread->setNextPC(thread->readNextNPC());
455 thread->setNextNPC(thread->readNextNPC() + sizeof(MachInst));
456 assert(thread->readNextPC() != thread->readNextNPC());
457#else
458 thread->setNextPC(thread->readNextPC() + sizeof(MachInst));
459#endif
460
461 }
462
463#if FULL_SYSTEM
464 Addr oldpc;
465 do {
466 oldpc = thread->readPC();
467 system->pcEventQueue.service(tc);
468 } while (oldpc != thread->readPC());
469#endif
470}
471