1/*
2 * Copyright (c) 2010-2012, 2015, 2017 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
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470
471void
472BaseSimpleCPU::setupFetchRequest(Request *req)
473{
474 SimpleExecContext &t_info = *threadInfo[curThread];
475 SimpleThread* thread = t_info.thread;
476
477 Addr instAddr = thread->instAddr();
478
479 // set up memory request for instruction fetch
480 DPRINTF(Fetch, "Fetch: PC:%08p\n", instAddr);
481
482 Addr fetchPC = (instAddr & PCMask) + t_info.fetchOffset;
483 req->setVirt(0, fetchPC, sizeof(MachInst), Request::INST_FETCH, instMasterId(),
484 instAddr);
485}
486
487
488void
489BaseSimpleCPU::preExecute()
490{
491 SimpleExecContext &t_info = *threadInfo[curThread];
492 SimpleThread* thread = t_info.thread;
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2 * Copyright (c) 2010-2012, 2015, 2017 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
--- 461 unchanged lines hidden (view full) ---
470
471void
472BaseSimpleCPU::setupFetchRequest(Request *req)
473{
474 SimpleExecContext &t_info = *threadInfo[curThread];
475 SimpleThread* thread = t_info.thread;
476
477 Addr instAddr = thread->instAddr();
478
479 // set up memory request for instruction fetch
480 DPRINTF(Fetch, "Fetch: PC:%08p\n", instAddr);
481
482 Addr fetchPC = (instAddr & PCMask) + t_info.fetchOffset;
483 req->setVirt(0, fetchPC, sizeof(MachInst), Request::INST_FETCH, instMasterId(),
484 instAddr);
485}
486
487
488void
489BaseSimpleCPU::preExecute()
490{
491 SimpleExecContext &t_info = *threadInfo[curThread];
492 SimpleThread* thread = t_info.thread;
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