1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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363 }
364#endif
365}
366
367
368void
369BaseSimpleCPU::setupFetchRequest(Request *req)
370{
371 Addr instAddr = thread->instAddr();
372
373 // set up memory request for instruction fetch
374 DPRINTF(Fetch, "Fetch: PC:%08p\n", instAddr);
375
376 Addr fetchPC = (instAddr & PCMask) + fetchOffset;
377 req->setVirt(0, fetchPC, sizeof(MachInst), Request::INST_FETCH, instAddr);
378}
379
380
381void
382BaseSimpleCPU::preExecute()
383{
384 // maintain $r0 semantics
385 thread->setIntReg(ZeroReg, 0);
386#if THE_ISA == ALPHA_ISA
387 thread->setFloatReg(ZeroReg, 0.0);
388#endif // ALPHA_ISA
389
390 // check for instruction-count-based events
391 comInstEventQueue[0]->serviceEvents(numInst);
392
393 // decode the instruction
394 inst = gtoh(inst);
395
396 TheISA::PCState pcState = thread->pcState();
397
398 if (isRomMicroPC(pcState.microPC())) {
399 stayAtPC = false;
400 curStaticInst = microcodeRom.fetchMicroop(pcState.microPC(),
401 curMacroStaticInst);
402 } else if (!curMacroStaticInst) {
403 //We're not in the middle of a macro instruction
404 StaticInstPtr instPtr = NULL;
405
406 //Predecode, ie bundle up an ExtMachInst
407 //This should go away once the constructor can be set up properly
408 predecoder.setTC(thread->getTC());
409 //If more fetch data is needed, pass it in.
410 Addr fetchPC = (pcState.instAddr() & PCMask) + fetchOffset;
411 //if(predecoder.needMoreBytes())
412 predecoder.moreBytes(pcState, fetchPC, inst);
413 //else
414 // predecoder.process();
415
416 //If an instruction is ready, decode it. Otherwise, we'll have to
417 //fetch beyond the MachInst at the current pc.
418 if (predecoder.extMachInstReady()) {
419 stayAtPC = false;
420 ExtMachInst machInst = predecoder.getExtMachInst(pcState);
421 thread->pcState(pcState);
422 instPtr = StaticInst::decode(machInst, pcState.instAddr());
423 } else {
424 stayAtPC = true;
425 fetchOffset += sizeof(MachInst);
426 }
427
428 //If we decoded an instruction and it's microcoded, start pulling
429 //out micro ops
430 if (instPtr && instPtr->isMacroop()) {
431 curMacroStaticInst = instPtr;
432 curStaticInst = curMacroStaticInst->fetchMicroop(pcState.microPC());
433 } else {
434 curStaticInst = instPtr;
435 }
436 } else {
437 //Read the next micro op from the macro op
438 curStaticInst = curMacroStaticInst->fetchMicroop(pcState.microPC());
439 }
440
441 //If we decoded an instruction this "tick", record information about it.
442 if(curStaticInst)
443 {
444#if TRACING_ON
445 traceData = tracer->getInstRecord(curTick, tc,
446 curStaticInst, thread->pcState(), curMacroStaticInst);
447
448 DPRINTF(Decode,"Decode: Decoded %s instruction: 0x%x\n",
449 curStaticInst->getName(), curStaticInst->machInst);
450#endif // TRACING_ON
451 }
452}
453
454void
455BaseSimpleCPU::postExecute()
456{
457 assert(curStaticInst);
458
459 TheISA::PCState pc = tc->pcState();
460 Addr instAddr = pc.instAddr();
461#if FULL_SYSTEM
462 if (thread->profile) {
463 bool usermode = TheISA::inUserMode(tc);
464 thread->profilePC = usermode ? 1 : instAddr;
465 ProfileNode *node = thread->profile->consume(tc, curStaticInst);
466 if (node)
467 thread->profileNode = node;
468 }
469#endif
470
471 if (curStaticInst->isMemRef()) {
472 numMemRefs++;
473 }
474
475 if (curStaticInst->isLoad()) {
476 ++numLoad;
477 comLoadEventQueue[0]->serviceEvents(numLoad);
478 }
479
480 if (CPA::available()) {
481 CPA::cpa()->swAutoBegin(tc, pc.nextInstAddr());
482 }
483
484 traceFunctions(instAddr);
485
486 if (traceData) {
487 traceData->dump();
488 delete traceData;
489 traceData = NULL;
490 }
491}
492
493
494void
495BaseSimpleCPU::advancePC(Fault fault)
496{
497 //Since we're moving to a new pc, zero out the offset
498 fetchOffset = 0;
499 if (fault != NoFault) {
500 curMacroStaticInst = StaticInst::nullStaticInstPtr;
501 fault->invoke(tc, curStaticInst);
502 predecoder.reset();
503 } else {
504 if (curStaticInst) {
505 if (curStaticInst->isLastMicroop())
506 curMacroStaticInst = StaticInst::nullStaticInstPtr;
507 TheISA::PCState pcState = thread->pcState();
508 TheISA::advancePC(pcState, curStaticInst);
509 thread->pcState(pcState);
510 }
511 }
512}
513
514/*Fault
515BaseSimpleCPU::CacheOp(uint8_t Op, Addr EffAddr)
516{
517 // translate to physical address
518 Fault fault = NoFault;

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