atomic.hh (5336:c7e21f4e5a2e) atomic.hh (5487:f0ac4112e128)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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34#include "cpu/simple/base.hh"
35
36class AtomicSimpleCPU : public BaseSimpleCPU
37{
38 public:
39
40 struct Params : public BaseSimpleCPU::Params {
41 int width;
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 25 unchanged lines hidden (view full) ---

34#include "cpu/simple/base.hh"
35
36class AtomicSimpleCPU : public BaseSimpleCPU
37{
38 public:
39
40 struct Params : public BaseSimpleCPU::Params {
41 int width;
42 bool simulate_stalls;
42 bool simulate_data_stalls;
43 bool simulate_inst_stalls;
43 };
44
45 AtomicSimpleCPU(Params *params);
46 virtual ~AtomicSimpleCPU();
47
48 virtual void init();
49
50 public:

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69 TickEvent(AtomicSimpleCPU *c);
70 void process();
71 const char *description() const;
72 };
73
74 TickEvent tickEvent;
75
76 const int width;
44 };
45
46 AtomicSimpleCPU(Params *params);
47 virtual ~AtomicSimpleCPU();
48
49 virtual void init();
50
51 public:

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70 TickEvent(AtomicSimpleCPU *c);
71 void process();
72 const char *description() const;
73 };
74
75 TickEvent tickEvent;
76
77 const int width;
77 const bool simulate_stalls;
78 const bool simulate_data_stalls;
79 const bool simulate_inst_stalls;
78
79 // main simulation loop (one cycle)
80 void tick();
81
82 class CpuPort : public Port
83 {
84 public:
85

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81 // main simulation loop (one cycle)
82 void tick();
83
84 class CpuPort : public Port
85 {
86 public:
87

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