atomic.hh (4475:fb185cc1c845) atomic.hh (4870:fcc39d001154)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 107 unchanged lines hidden (view full) ---

116 DcachePort(const std::string &_name, AtomicSimpleCPU *_cpu)
117 : CpuPort(_name, _cpu)
118 { }
119
120 virtual void setPeer(Port *port);
121 };
122 DcachePort dcachePort;
123
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 107 unchanged lines hidden (view full) ---

116 DcachePort(const std::string &_name, AtomicSimpleCPU *_cpu)
117 : CpuPort(_name, _cpu)
118 { }
119
120 virtual void setPeer(Port *port);
121 };
122 DcachePort dcachePort;
123
124 Request *ifetch_req;
125 PacketPtr ifetch_pkt;
126 Request *data_read_req;
127 PacketPtr data_read_pkt;
128 Request *data_write_req;
129 PacketPtr data_write_pkt;
130 PacketPtr data_swap_pkt;
124 Request ifetch_req;
125 Request data_read_req;
126 Request data_write_req;
131
132 bool dcache_access;
133 Tick dcache_latency;
134
135 public:
136
137 virtual Port *getPort(const std::string &if_name, int idx = -1);
138

--- 18 unchanged lines hidden --- 		127
128 bool dcache_access;
129 Tick dcache_latency;
130
131 public:
132
133 virtual Port *getPort(const std::string &if_name, int idx = -1);
134

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