atomic.hh (3192:f3e215dda3f6) atomic.hh (3349:fec4a86fa212)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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87 public:
88
89 CpuPort(const std::string &_name, AtomicSimpleCPU *_cpu)
90 : Port(_name), cpu(_cpu)
91 { }
92
93 protected:
94
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 78 unchanged lines hidden (view full) ---

87 public:
88
89 CpuPort(const std::string &_name, AtomicSimpleCPU *_cpu)
90 : Port(_name), cpu(_cpu)
91 { }
92
93 protected:
94
95 virtual bool recvTiming(Packet *pkt);
95 virtual bool recvTiming(PacketPtr pkt);
96
96
97 virtual Tick recvAtomic(Packet *pkt);
97 virtual Tick recvAtomic(PacketPtr pkt);
98
98
99 virtual void recvFunctional(Packet *pkt);
99 virtual void recvFunctional(PacketPtr pkt);
100
101 virtual void recvStatusChange(Status status);
102
103 virtual void recvRetry();
104
105 virtual void getDeviceAddressRanges(AddrRangeList &resp,
106 AddrRangeList &snoop)
107 { resp.clear(); snoop.clear(); snoop.push_back(RangeSize(0,-1)); }
108
109 };
110 CpuPort icachePort;
111 CpuPort dcachePort;
112
100
101 virtual void recvStatusChange(Status status);
102
103 virtual void recvRetry();
104
105 virtual void getDeviceAddressRanges(AddrRangeList &resp,
106 AddrRangeList &snoop)
107 { resp.clear(); snoop.clear(); snoop.push_back(RangeSize(0,-1)); }
108
109 };
110 CpuPort icachePort;
111 CpuPort dcachePort;
112
113 Request *ifetch_req;
114 Packet *ifetch_pkt;
115 Request *data_read_req;
116 Packet *data_read_pkt;
117 Request *data_write_req;
118 Packet *data_write_pkt;
113 Request *ifetch_req;
114 PacketPtr ifetch_pkt;
115 Request *data_read_req;
116 PacketPtr data_read_pkt;
117 Request *data_write_req;
118 PacketPtr data_write_pkt;
119
120 bool dcache_access;
121 Tick dcache_latency;
122
123 public:
124
125 virtual Port *getPort(const std::string &if_name, int idx = -1);
126

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120 bool dcache_access;
121 Tick dcache_latency;
122
123 public:
124
125 virtual Port *getPort(const std::string &if_name, int idx = -1);
126

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