atomic.hh (13954:2f400a5f2627) | atomic.hh (14085:0075b0d29d55) |
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1/* 2 * Copyright (c) 2012-2013, 2015, 2018 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 74 unchanged lines hidden (view full) --- 83 * as these are executed atomically within a single tick() 84 * call. The only way this can happen at the moment is if 85 * there is an event in the PC event queue that affects the 86 * CPU state while it is in an LLSC region. 87 * 88 * <li>Stay at PC is true. 89 * </ul> 90 */ | 1/* 2 * Copyright (c) 2012-2013, 2015, 2018 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 74 unchanged lines hidden (view full) --- 83 * as these are executed atomically within a single tick() 84 * call. The only way this can happen at the moment is if 85 * there is an event in the PC event queue that affects the 86 * CPU state while it is in an LLSC region. 87 * 88 * <li>Stay at PC is true. 89 * </ul> 90 */ |
91 bool isDrained() { | 91 bool isCpuDrained() const { |
92 SimpleExecContext &t_info = *threadInfo[curThread]; 93 94 return t_info.thread->microPC() == 0 && 95 !locked && 96 !t_info.stayAtPC; 97 } 98 99 /** --- 142 unchanged lines hidden --- | 92 SimpleExecContext &t_info = *threadInfo[curThread]; 93 94 return t_info.thread->microPC() == 0 && 95 !locked && 96 !t_info.stayAtPC; 97 } 98 99 /** --- 142 unchanged lines hidden --- |