1/*
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Steve Reinhardt
41 */
42
43#ifndef __CPU_SIMPLE_ATOMIC_HH__
44#define __CPU_SIMPLE_ATOMIC_HH__
45
46#include "cpu/simple/base.hh"
47#include "params/AtomicSimpleCPU.hh"
48
49class AtomicSimpleCPU : public BaseSimpleCPU
50{
51 public:
52
53 AtomicSimpleCPU(AtomicSimpleCPUParams *params);
54 virtual ~AtomicSimpleCPU();
55
56 virtual void init();

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156 bool fastmem;
157 Request ifetch_req;
158 Request data_read_req;
159 Request data_write_req;
160
161 bool dcache_access;
162 Tick dcache_latency;
163
164 protected:
165
166 /** Return a reference to the data port. */
167 virtual MasterPort &getDataPort() { return dcachePort; }
168
169 /** Return a reference to the instruction port. */
170 virtual MasterPort &getInstPort() { return icachePort; }
171

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