1/*
2 * Copyright (c) 2012-2013, 2015, 2018 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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158
159 AtomicCPUPort icachePort;
160 AtomicCPUDPort dcachePort;
161
162
163 RequestPtr ifetch_req;
164 RequestPtr data_read_req;
165 RequestPtr data_write_req;
166 RequestPtr data_amo_req;
167
168 bool dcache_access;
169 Tick dcache_latency;
170
171 /** Probe Points. */
172 ProbePointArg<std::pair<SimpleThread*, const StaticInstPtr>> *ppCommit;
173
174 protected:

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193 void verifyMemoryMode() const override;
194
195 void activateContext(ThreadID thread_num) override;
196 void suspendContext(ThreadID thread_num) override;
197
198 Fault readMem(Addr addr, uint8_t *data, unsigned size,
199 Request::Flags flags) override;
200
201 Fault writeMem(uint8_t *data, unsigned size,
202 Addr addr, Request::Flags flags, uint64_t *res) override;
203
204 Fault amoMem(Addr addr, uint8_t* data, unsigned size,
205 Request::Flags flags, AtomicOpFunctor *amo_op) override;
206
207 void regProbePoints() override;
208
209 /**
210 * Print state of address in memory system via PrintReq (for
211 * debugging).
212 */
213 void printAddr(Addr a);
214};
215
216#endif // __CPU_SIMPLE_ATOMIC_HH__